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([193.232.173.109]) by smtp.gmail.com with ESMTPSA id d22-20020ac241d6000000b0051327d2f5e5sm1729568lfi.119.2024.04.22.06.32.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 06:32:21 -0700 (PDT) From: Konstantin Pugin To: Cc: krzk@kernel.org, conor@kernel.org, lkp@intel.com, vz@mleia.com, robh@kernel.org, jcmvbkbc@gmail.com, nicolas.ferre@microchip.com, manikanta.guntupalli@amd.com, corbet@lwn.net, ychuang3@nuvoton.com, u.kleine-koenig@pengutronix.de, Maarten.Brock@sttls.nl, Konstantin Pugin , Greg Kroah-Hartman , Jiri Slaby , Hugo Villeneuve , Andy Shevchenko , Lech Perczak , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Subject: [PATCH v7 0/3] add support for EXAR XR20M1172 UART Date: Mon, 22 Apr 2024 16:32:12 +0300 Message-Id: <20240422133219.2710061-1-ria.freelander@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 EXAR XR20M1172 UART is mostly SC16IS762-compatible, but it has additional register which can change UART multiplier to 4x and 8x, similar to UPF_MAGIC_MULTIPLIER does. So, I used this flag to guard access to its specific DLD register. It seems than other EXAR SPI UART modules also have this register, but I tested only XR20M1172. Yes, in datasheet this register is called "DLD - Divisor Fractional" or "DLD - Divisor Fractional Register", calling depends on datasheet version. I am sorry about too many submissions and top post reply. About second - I do not know how to reply properly to this ML from GMail phone app. About first - I just get very good feedback from Andy Shevchenko, and want to fix his review picks ASAP. Changes in v2: - use full name in git authorship Changes in v3: - change formatting of commit messages to unify width - rework commit messages according to code review - add XR20M117X namespace for EXAR-specific register - do not use UPF_MAGIC_MULTIPLIER for checking EXAR chip, use s->devtype directly - replace while loop to fls function and expanded check - sort compatibles - reformat multiline comment. Changes in v4: - rebase onto tty-next branch - added Kconfig mention of the chip - used rounddown_power_of_two instead of fls and manual shift - used FIELD_PREP instead of custom macro - removed has_dld bit from common struct, replaced by check function, which checks directly by s->devtype - fixed tab count - properly apply Vladimir Zapolskiy's tag to patch 2 only Changes in v5: - fixes for tty-next branch - address a new code review picks - send properly to all participants - added Ack tag Changes in v6: - KConfig fixes - New code review fixes Changes in v7: - Added missed tag - Added missed v5 fixes Konstantin Pugin (3): serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND dt-bindings: sc16is7xx: Add compatible line for XR20M1172 UART serial: sc16is7xx: add support for EXAR XR20M1172 UART .../bindings/serial/nxp,sc16is7xx.yaml | 1 + drivers/tty/serial/Kconfig | 3 +- drivers/tty/serial/sc16is7xx.c | 63 +++++++++++++++++-- drivers/tty/serial/sc16is7xx.h | 1 + drivers/tty/serial/sc16is7xx_i2c.c | 1 + drivers/tty/serial/sc16is7xx_spi.c | 1 + 6 files changed, 64 insertions(+), 6 deletions(-) base-commit: f70f95b485d78838ad28dbec804b986d11ad7bb0 Tested-by: Hugo Villeneuve