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([82.78.167.24]) by smtp.gmail.com with ESMTPSA id br13-20020a170906d14d00b0099cb349d570sm2642490ejb.185.2023.10.06.03.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Oct 2023 03:40:20 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 0/4] Add new Renesas RZ/G3S SoC and RZ/G3S SMARC EVK Date: Fri, 6 Oct 2023 13:39:55 +0300 Message-Id: <20231006103959.197485-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Claudiu Beznea Hi, This patch series adds initial support for The Renesas RZ/G3S (R9A08G045{S33}) SoC. The RZ/G3S device is a general-purpose microprocessor with a single-core Arm® Cortex®-A55 (1.1GHz) and a dual-core Arm® Cortex®-M33 (250MHz), perfect for an IOT gateway controller. This includes: - SoC identification; - clocks (core clocks, pin controller clock, serial interface, SD ch0 clock) and corresponding resets; - minimal device tree for SoM and carrier boards. With this series Linux can boot from eMMC or SD card. The eMMC and uSD interface are multiplexed on the SoM; selection is made using a hardware switch. Patches are gouped as follows: - 01 documents scif support; - 02-04 clock changes needed by RZ/G3S Changes in v3: - remove from series patches that were already integrated - addressed review comments - please see individual patches for detailed changes Changes in v2: - addressed review comments - collected tags - removed from series patches that were already integrated - added patches: - [PATCH v2 19/28] dt-bindings: pinctrl: renesas: set additionalProperties: false - [PATCH v2 23/28] dt-bindings: arm: renesas: document RZ/G3S SMARC SoM - [PATCH v2 26/28] dt-bindings: arm: renesas: document SMARC Carrier-II EVK - please see individual patches for detailed changes Claudiu Beznea (4): dt-bindings: serial: renesas,scif: document r9a08g045 support clk: renesas: rzg2l: refactor sd mux driver clk: renesas: rzg2l: add a divider clock for RZ/G3S clk: renesas: add minimal boot support for RZ/G3S SoC .../bindings/serial/renesas,scif.yaml | 1 + drivers/clk/renesas/Kconfig | 7 +- drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/r9a07g043-cpg.c | 12 +- drivers/clk/renesas/r9a07g044-cpg.c | 12 +- drivers/clk/renesas/r9a08g045-cpg.c | 214 +++++++++++ drivers/clk/renesas/rzg2l-cpg.c | 342 +++++++++++++++--- drivers/clk/renesas/rzg2l-cpg.h | 28 +- 8 files changed, 565 insertions(+), 52 deletions(-) create mode 100644 drivers/clk/renesas/r9a08g045-cpg.c Reviewed-by: Geert Uytterhoeven