From patchwork Fri Feb 25 07:39:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yu Tu X-Patchwork-Id: 546392 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B3F9C433F5 for ; Fri, 25 Feb 2022 07:39:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238147AbiBYHk3 (ORCPT ); Fri, 25 Feb 2022 02:40:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232659AbiBYHk3 (ORCPT ); Fri, 25 Feb 2022 02:40:29 -0500 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55872177764; Thu, 24 Feb 2022 23:39:57 -0800 (PST) Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Fri, 25 Feb 2022 15:39:55 +0800 From: Yu Tu To: , , , CC: Greg Kroah-Hartman , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V7 0/6] Use CCF to describe the UART baud rate clock Date: Fri, 25 Feb 2022 15:39:16 +0800 Message-ID: <20220225073922.3947-1-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Using the common Clock code to describe the UART baud rate clock makes it easier for the UART driver to be compatible with the baud rate requirements of the UART IP on different meson chips. Add Meson S4 SoC compatible. The test method: Start the console and run the following commands in turn: stty -F /dev/ttyAML0 115200 and stty -F /dev/ttyAML0 921600. Since most SoCs are too old, I was able to find all the platforms myself such as Meson6, Meson8, Meson8b, GXL and so on. I only tested it with G12A and S4. Yu Tu (6): tty: serial: meson: Move request the register region to probe tty: serial: meson: Use devm_ioremap_resource to get register mapped memory tty: serial: meson: Describes the calculation of the UART baud rate clock using a clock frame tty: serial: meson: Make some bit of the REG5 register writable tty: serial: meson: The system stuck when you run the stty command on the console to change the baud rate tty: serial: meson: Added S4 SOC compatibility V6 -> V7: To solve the system stuck when you run the stty command on the console to change the baud rate. V5 -> V6: Change error format as discussed in the email. V4 -> V5: Change error format. V3 -> V4: Change CCF to describe the UART baud rate clock as discussed in the email. V2 -> V3: add compatible = "amlogic,meson-gx-uart". Because it must change the DTS before it can be deleted V1 -> V2: Use CCF to describe the UART baud rate clock.Make some changes as discussed in the email Link:https://lore.kernel.org/linux-amlogic/20220118030911.12815-4-yu.tu@amlogic.com/ drivers/tty/serial/meson_uart.c | 221 ++++++++++++++++++++++---------- 1 file changed, 154 insertions(+), 67 deletions(-) base-commit: a603ca60cebff8589882427a67f870ed946b3fc8