From patchwork Tue Dec 18 03:41:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154038 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3228348ljp; Mon, 17 Dec 2018 19:42:03 -0800 (PST) X-Google-Smtp-Source: AFSGD/XS+Uv9Azfi9ajLPKfdJdExjVvfUUDhj3e0mkrzjdXndd+E1StkQLH+3yYFYRwsORDTKo68 X-Received: by 2002:a63:f94c:: with SMTP id q12mr14239916pgk.91.1545104523674; Mon, 17 Dec 2018 19:42:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545104523; cv=none; d=google.com; s=arc-20160816; b=eY6wkPAUQDzigGCygQGEynsjJDIPYL7suoCNcX/8w/or/V3kd+6t6vvpWnEmCf76Gk ehjBY5ktyCfLmcuIb5jo3eHwT0L28A0pZA0ucXFYUrIvxsr8O+hbiZwLOm8tnxxXtbP2 Rf4Q5i6Gg0Pd1jPDArlXP6lPUylGV2v322gq/fNDkdWNea0PYSd/WH3PqpUWrbUGju/N bv91gJ42zSPLThjatdMLPb7puiRPUTlPbo0syAzb0DJX9uT7bJkUrWx38uARUblqnuEx qA6U+voaClOEUBcDLawTLMzIlbni5LwI45TnkDU2XthnifYUFNNXGl0DIRLWl7Dn3+Yw E4Rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=hs4OFtBvTEICsxyk99pvT2Zl5zpLIGiZC2HOUjEKzsA=; b=p0aO+ATQpvA4nvXx/ZsEzpA6V68tRP+rESsF6dUVKRBOb8FjIAs4tYSOwGJWpBgRtO rrUjgErCJ3dSPOSY88scvhf9qcX/2OG7xtZh21S/yTIJJHkxAJ6F6g0ELgB8zNnSBu5p zx/2GtOnsHyB3+kg+OkKvUUsZB+9YbwkoJBSXUCNvZadfqqgEs513G7jEE85BL9+m9RV AVXCIoC63DQwBoe+NJQc8u6xFHVDwIZP7C7BgC/wXv4Db7UG5UDgOFeZokNjLNX2K0Rh 5rjMtqW/dDWL8GZUw1HMBciJ/pbf0N0O+/wYHLXB4V3W0zRbleNwvE0Iwav7CHXu2EbG JKLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="f3Ytmy/L"; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o61si12454678pld.246.2018.12.17.19.42.02; Mon, 17 Dec 2018 19:42:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="f3Ytmy/L"; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726305AbeLRDmB (ORCPT + 2 others); Mon, 17 Dec 2018 22:42:01 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:43756 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726296AbeLRDmA (ORCPT ); Mon, 17 Dec 2018 22:42:00 -0500 Received: by mail-pf1-f194.google.com with SMTP id w73so7417468pfk.10 for ; Mon, 17 Dec 2018 19:42:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hs4OFtBvTEICsxyk99pvT2Zl5zpLIGiZC2HOUjEKzsA=; b=f3Ytmy/LDGeCLbrL9sdHmR5darDWzsw8l4fZqkocXJ4Pxmpr267zHcK6w/taFkCvQj PVolR1lvpHQU8pJswlx6b0e7q1/FKul6SDXRNSaDkj37GfWCfiitiCR4pkjYrIBSS/Hu RSgqZYNSfendmgFKrktZ8QekMVBokp5mJ549o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hs4OFtBvTEICsxyk99pvT2Zl5zpLIGiZC2HOUjEKzsA=; b=r29e5ImnCubSke3PNPq3UJUwNOBvLYHm3OvUQnwLGbwu1AfalmUzP1DnlfRrtDgYlP QziwC/hqPfW/Wbdc9rXt3Xjg2mtwVM3jHkMDKTZC4TBUzxCfqGUBASUjGiFp68yjBqAB D1fsIOCRJFfYmnv8YxJVTMompS4F596TXtMxUce9XKycu7rUdoNCTgEtoR9aFyWP6QDc 6idaIg+w3/y3iIJHBa/DJBhbfEPlTyHQTlGlV4SZsSjh3tJL863OOLRMMXomuGWc1vfP SBmNiA4XWW2FCQ5T/FXFJgryggesktp3T3Ot1I+28JA42Kaxndne4+S23x3p0fUz7nDp WhbQ== X-Gm-Message-State: AA+aEWbVErWPGJUb3eJZIkwBh+P4OheDWsIM7wdayJeUrdJUJstI/R9B FkWDtGBQpFg/leZ7WTEgwGaW X-Received: by 2002:a63:4b60:: with SMTP id k32mr14259363pgl.186.1545104519695; Mon, 17 Dec 2018 19:41:59 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id b202sm25255422pfb.88.2018.12.17.19.41.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Dec 2018 19:41:58 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v5 00/11] Add initial RDA8810PL SoC and Orange Pi boards support Date: Tue, 18 Dec 2018 09:11:21 +0530 Message-Id: <20181218034132.5070-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Hello, This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860 GPU. The SoC has been added as a new ARM sub architecture with myself and Andreas as the maintainers. More information about the boards can be found in below links: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ This patchset is based on the initial revision sent out by Andreas long back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html). I have extended his patchset with proper irqchip and UART drivers. Now, boards can boot into initramfs with console at UART2. Thanks, Mani Changes in v5: * Dropped timer and irqchip patches since they got applied * Dropped Andreas from MAINTAINERS as per his request Changes in v4: * Added Rob's Reviewed-by tags for vendor and SoC patches. * Moved platform Kconfig changes from timer and irqchip drivers to SoC support patch. * Added Marc's Reviewed-by tag for irqchip driver. * Addressed Rob's review comments for bindings patches. * Added the newly created linux-unisoc mailing list to MAINTAINERS entry. * Dropped overseas.sales@unisoc.com mail address as it is bouncing back. * Modified the DTS subject prefix to ARM: from arm: Changes in v3: As per Marc's review: * Removed unused header and defines from irqchip driver. * Removed setting flow handlers from set_type callback. * Minor code cleanups. As per Arnd's review: * Modified the UART indexes to start from 1 to match the SoC numbering * Enabled exposed UARTs (all 3 on both boards) * Modified the serial aliases as per board numbering * Added Greg's Reviewed-by tag for serial driver. Changes in v2: * Used readl/writel_relaxed calls for both irqchip and timer drivers as per Marc's review. * Implemented the logic to prevent counter wrapping during read as suggested by Marc. * Used the timer-of API as per Daniel's suggestion. * Added description about the timer in both commit log and driver. * Changed the Vendor name for RDA to Unisoc Communications Inc. * Removed the soc node level and cleaned up devicetrees as per Rob's review. * Merged interrupt controller DT patch to SoC. * Moved aliases to board dts as per Arnd's suggestion. * Removed RDA Micro support mail address and used Unisoc one and added my missing signed off by tag as per Andreas's comments. Andreas Färber (4): dt-bindings: Add RDA Micro vendor prefix dt-bindings: arm: Document RDA8810PL and reference boards ARM: Prepare RDA8810PL SoC dt-bindings: serial: Document RDA Micro UART Manivannan Sadhasivam (7): ARM: dts: Add devicetree for RDA8810PL SoC ARM: dts: Add devicetree for OrangePi 2G IoT board ARM: dts: Add devicetree for OrangePi i96 board ARM: dts: rda8810pl: Add timer support ARM: dts: rda8810pl: Add interrupt support for UART tty: serial: Add RDA8810PL UART driver MAINTAINERS: Add entry for RDA Micro SoC architecture .../admin-guide/kernel-parameters.txt | 6 + Documentation/devicetree/bindings/arm/rda.txt | 17 + .../bindings/serial/rda,8810pl-uart.txt | 17 + .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 14 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 50 ++ arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++ arch/arm/boot/dts/rda8810pl.dtsi | 99 +++ arch/arm/mach-rda/Kconfig | 9 + arch/arm/mach-rda/Makefile | 1 + drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 17 files changed, 1124 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1