diff mbox series

[27/29] x86/cpu: Remove x86_coreid_bits

Message ID	20230724172845.262452064@linutronix.de
State	Superseded
Headers	show Return-Path: <linux-scsi-owner@vger.kernel.org> Message-ID: <20230724172845.262452064@linutronix.de> From: Thomas Gleixner <tglx@linutronix.de> To: LKML <linux-kernel@vger.kernel.org> Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>, Andrew Cooper <andrew.cooper3@citrix.com>, Arjan van de Ven <arjan@linux.intel.com>, "James E.J. Bottomley" <jejb@linux.ibm.com>, Dick Kennedy <dick.kennedy@broadcom.com>, James Smart <james.smart@broadcom.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, linux-scsi@vger.kernel.org, linux-hwmon@vger.kernel.org, Jean Delvare <jdelvare@suse.com>, Huang Rui <ray.huang@amd.com>, Guenter Roeck <linux@roeck-us.net>, Steve Wahl <steve.wahl@hpe.com>, Mike Travis <mike.travis@hpe.com>, Dimitri Sivanich <dimitri.sivanich@hpe.com>, Russ Anderson <russ.anderson@hpe.com> Subject: [patch 27/29] x86/cpu: Remove x86_coreid_bits References: <20230724155329.474037902@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Date: Mon, 24 Jul 2023 19:44:33 +0200 (CEST) Precedence: bulk
Series	x86/cpu: Rework the topology evaluation \| expand [00/29] x86/cpu: Rework the topology evaluation [01/29] x86/cpu: Encapsulate topology information in cpuinfo_x86 [02/29] x86/cpu: Move phys_proc_id into topology info [03/29] x86/cpu: Move cpu_die_id into topology info [04/29] scsi: lpfc: Use topology_core_id() [05/29] hwmon: (fam15h_power) Use topology_core_id() [06/29] x86/cpu: Move cpu_core_id into topology info [07/29] x86/cpu: Move cu_id into topology info [08/29] x86/cpu: Remove pointless evaluation of x86_coreid_bits [09/29] x86/cpu: Move logical package and die IDs into topology info [10/29] x86/cpu: Move cpu_l[l2]c_id into topology info [11/29] x86/cpu: Provide debug interface [12/29] x86/cpu: Provide cpuid_read() et al. [13/29] x86/cpu: Provide cpu_init/parse_topology() [14/29] x86/cpu: Add legacy topology parser [15/29] x86/cpu: Use common topology code for Centaur and Zhaoxin [16/29] x86/cpu: Move __max_die_per_package to common.c [17/29] x86/cpu: Provide a sane leaf 0xb/0x1f parser [18/29] x86/cpu: Use common topology code for Intel [19/29] x86/cpu/amd: Provide a separate acessor for Node ID [20/29] x86/cpu: Provide an AMD/HYGON specific topology parser [21/29] x86/smpboot: Teach it about topo.amd_node_id [22/29] x86/cpu: Use common topology code for AMD [23/29] x86/cpu: Use common topology code for HYGON [24/29] x86/mm/numa: Use core domain size on AMD [25/29] x86/cpu: Make topology_amd_node_id() use the actual node info [26/29] x86/cpu: Remove topology.c [27/29] x86/cpu: Remove x86_coreid_bits [28/29] x86/apic: Remove unused phys_pkg_id() callback [29/29] x86/apic/uv: Remove the private leaf 0xb parser

Commit Message

Thomas Gleixner July 24, 2023, 5:44 p.m. UTC

No more users.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/processor.h |    2 --
 arch/x86/kernel/cpu/common.c     |    1 -
 2 files changed, 3 deletions(-)

diff mbox series

Patch

--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -119,8 +119,6 @@  struct cpuinfo_x86 {
 #endif
 	__u8			x86_virt_bits;
 	__u8			x86_phys_bits;
-	/* CPUID returned core id bits: */
-	__u8			x86_coreid_bits;
 	/* Max extended CPUID function supported: */
 	__u32			extended_cpuid_level;
 	/* Maximum supported CPUID level, -1=no CPUID: */
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1712,7 +1712,6 @@  static void identify_cpu(struct cpuinfo_
 	c->x86_vendor_id[0] = '\0'; /* Unset */
 	c->x86_model_id[0] = '\0';  /* Unset */
 	c->x86_max_cores = 1;
-	c->x86_coreid_bits = 0;
 #ifdef CONFIG_X86_64
 	c->x86_clflush_size = 64;
 	c->x86_phys_bits = 36;