From patchwork Thu Feb 23 15:27:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Po-Wen Kao X-Patchwork-Id: 656206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D879DC677F1 for ; Thu, 23 Feb 2023 15:28:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234685AbjBWP2a (ORCPT ); Thu, 23 Feb 2023 10:28:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234579AbjBWP21 (ORCPT ); Thu, 23 Feb 2023 10:28:27 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D26414E5C4; Thu, 23 Feb 2023 07:28:23 -0800 (PST) X-UUID: b2381f10b38e11ed945fc101203acc17-20230223 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=d7rfc8R04jaAj0ITZoFz9RJ9lBwYyOyMLNJ9BzDX9uI=; b=NDASsG4YVdd6ISRuUJ0Sfh3514Hht28T9dtpnaHll2zNmjAtQc9AdbJGNcURe9XkhYK6+eNowh908OGyfvti/WyelmLGFGpxZCGeErwQcfP7byIu7cYerqZctAJUwCH1FDesaaz2co5kjB6NYPbYkBVdHgpGMDo9s8rZZjdr+aw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20, REQID:eb025b05-b2d6-4b01-af76-671d895df773, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.20, REQID:eb025b05-b2d6-4b01-af76-671d895df773, IP:0, URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:25b5999, CLOUDID:d8af8126-564d-42d9-9875-7c868ee415ec, B ulkID:230223232818WJU3R8KM,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-UUID: b2381f10b38e11ed945fc101203acc17-20230223 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 11425957; Thu, 23 Feb 2023 23:28:17 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 23 Feb 2023 23:28:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 23 Feb 2023 23:28:16 +0800 From: Po-Wen Kao To: , , , , Alim Akhtar , Avri Altman , Bart Van Assche , "James E.J. Bottomley" , "Martin K. Petersen" , Matthias Brugger CC: , , , , , , , , , , , Subject: [PATCH v3 3/6] scsi: ufs: core: Fix mcq nr_hw_queues Date: Thu, 23 Feb 2023 23:27:53 +0800 Message-ID: <20230223152757.13606-4-powen.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230223152757.13606-1-powen.kao@mediatek.com> References: <20230223152757.13606-1-powen.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Since MAXQ is 0 based value, add one to obtain number of hardware queue. Signed-off-by: Po-Wen Kao Reviewed-by: Bean Huo --- drivers/ufs/core/ufs-mcq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index a39746b2a8be..f9af658b4ba2 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -150,7 +150,8 @@ static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba) u32 hba_maxq, rem, tot_queues; struct Scsi_Host *host = hba->host; - hba_maxq = FIELD_GET(MAX_QUEUE_SUP, hba->mcq_capabilities); + /* maxq is 0 based value */ + hba_maxq = FIELD_GET(MAX_QUEUE_SUP, hba->mcq_capabilities) + 1 ; tot_queues = UFS_MCQ_NUM_DEV_CMD_QUEUES + read_queues + poll_queues + rw_queues;