| Message ID | 20221221171222.19699-2-quic_ahari@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | scsi: ufs: Add hibernation callbacks | expand |
On 12/21/22 09:12, Anjana Hari wrote: > Add hibernation call backs - freeze, restore and thaw. > Add the respective prototypes. > > Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> > --- > drivers/ufs/core/ufshcd.c | 80 +++++++++++++++++++++++++++++++++++++++ > include/ufs/ufshcd.h | 6 +++ > 2 files changed, 86 insertions(+) > > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c > index bda61be5f035..c216a97dc1dd 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -9453,6 +9453,25 @@ static int ufshcd_resume(struct ufs_hba *hba) > > /* enable the host irq as host controller would be active soon */ > ufshcd_enable_irq(hba); > + > + if (hba->restore) { > + /* Configure UTRL and UTMRL base address registers */ > + ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), > + REG_UTP_TRANSFER_REQ_LIST_BASE_L); > + ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr), > + REG_UTP_TRANSFER_REQ_LIST_BASE_H); > + ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr), > + REG_UTP_TASK_REQ_LIST_BASE_L); > + ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr), > + REG_UTP_TASK_REQ_LIST_BASE_H); > + /* Commit the registers */ > + mb(); > + } The comment above the mb() call is wrong. No matter the type of a barrier, a barrier controls the order in which load, store and/or MMIO operations happen. A barrier does not "commit" register writes. The comment above mb() should explain which load, store and/or MMIO accesses are ordered and also why the ordering is necessary. > + /* > + * Ensure no runtime PM operations take > + * place in the hibernation and restore sequence > + * on successful freeze operation. > + */ > + if (!ret) > + pm_runtime_disable(hba->dev); I think the power management core already serializes system-wide power management state transitions and runtime power management and hence that the above code can be left out. > + /* > + * Now any runtime PM operations can be > + * allowed on successful restore operation > + */ > + if (!ret) > + pm_runtime_enable(hba->dev); Same comment for the above code. > + return ret; > +} > +EXPORT_SYMBOL_GPL(ufshcd_system_restore); > + > +int ufshcd_system_thaw(struct device *dev) > +{ > + > + struct ufs_hba *hba = dev_get_drvdata(dev); > + int ret = 0; > + > + ret = ufshcd_system_resume(dev); > + if (!ret) > + pm_runtime_enable(hba->dev); > + > + return ret; > +} > +EXPORT_SYMBOL_GPL(ufshcd_system_thaw); Also here, please remove the code related to runtime power management. > diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h > index 5cf81dff60aa..dadb3c732be4 100644 > --- a/include/ufs/ufshcd.h > +++ b/include/ufs/ufshcd.h > @@ -978,6 +978,9 @@ struct ufs_hba { > #endif > u32 luns_avail; > bool complete_put; > + > + /* Distinguish between resume and restore */ > + bool restore; > }; Please convert this member variable into a function argument. This probably will require adding an argument to existing functions. Thanks, Bart.
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index bda61be5f035..c216a97dc1dd 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -9453,6 +9453,25 @@ static int ufshcd_resume(struct ufs_hba *hba) /* enable the host irq as host controller would be active soon */ ufshcd_enable_irq(hba); + + if (hba->restore) { + /* Configure UTRL and UTMRL base address registers */ + ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr), + REG_UTP_TRANSFER_REQ_LIST_BASE_L); + ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr), + REG_UTP_TRANSFER_REQ_LIST_BASE_H); + ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr), + REG_UTP_TASK_REQ_LIST_BASE_L); + ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr), + REG_UTP_TASK_REQ_LIST_BASE_H); + /* Commit the registers */ + mb(); + } + + /* Resuming from hibernate, assume that link was OFF */ + if (hba->restore) + ufshcd_set_link_off(hba); + goto out; disable_vreg: @@ -9616,6 +9635,67 @@ void ufshcd_remove(struct ufs_hba *hba) } EXPORT_SYMBOL_GPL(ufshcd_remove); +int ufshcd_system_freeze(struct device *dev) +{ + + struct ufs_hba *hba = dev_get_drvdata(dev); + int ret = 0; + + /* + * Run time resume the controller to make sure + * the PM work queue threads do not try to resume + * the child (scsi host), which leads to errors as + * the controller is not yet resumed. + */ + pm_runtime_get_sync(hba->dev); + ret = ufshcd_system_suspend(dev); + pm_runtime_put_sync(hba->dev); + + /* + * Ensure no runtime PM operations take + * place in the hibernation and restore sequence + * on successful freeze operation. + */ + if (!ret) + pm_runtime_disable(hba->dev); + + return 0; +} +EXPORT_SYMBOL_GPL(ufshcd_system_freeze); + +int ufshcd_system_restore(struct device *dev) +{ + struct ufs_hba *hba = dev_get_drvdata(dev); + int ret = 0; + + hba->restore = true; + ret = ufshcd_system_resume(dev); + + /* + * Now any runtime PM operations can be + * allowed on successful restore operation + */ + if (!ret) + pm_runtime_enable(hba->dev); + + return ret; +} +EXPORT_SYMBOL_GPL(ufshcd_system_restore); + +int ufshcd_system_thaw(struct device *dev) +{ + + struct ufs_hba *hba = dev_get_drvdata(dev); + int ret = 0; + + ret = ufshcd_system_resume(dev); + if (!ret) + pm_runtime_enable(hba->dev); + + return ret; +} +EXPORT_SYMBOL_GPL(ufshcd_system_thaw); + /** * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA) * @hba: pointer to Host Bus Adapter (HBA) diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 5cf81dff60aa..dadb3c732be4 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -978,6 +978,9 @@ struct ufs_hba { #endif u32 luns_avail; bool complete_put; + + /* Distinguish between resume and restore */ + bool restore; }; /* Returns true if clocks can be gated. Otherwise false */ @@ -1101,6 +1104,9 @@ extern int ufshcd_runtime_resume(struct device *dev); extern int ufshcd_system_suspend(struct device *dev); extern int ufshcd_system_resume(struct device *dev); #endif +extern int ufshcd_system_freeze(struct device *dev); +extern int ufshcd_system_thaw(struct device *dev); +extern int ufshcd_system_restore(struct device *dev); extern int ufshcd_shutdown(struct ufs_hba *hba); extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba, int agreed_gear,
Add hibernation call backs - freeze, restore and thaw. Add the respective prototypes. Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> --- drivers/ufs/core/ufshcd.c | 80 +++++++++++++++++++++++++++++++++++++++ include/ufs/ufshcd.h | 6 +++ 2 files changed, 86 insertions(+)