From patchwork Tue Jun 14 01:16:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 581921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C41C433EF for ; Tue, 14 Jun 2022 01:17:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345008AbiFNBRE (ORCPT ); Mon, 13 Jun 2022 21:17:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245007AbiFNBQz (ORCPT ); Mon, 13 Jun 2022 21:16:55 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5E7D2C652; Mon, 13 Jun 2022 18:16:49 -0700 (PDT) X-UUID: 735172aac751471ba5a53f9cd890940c-20220614 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6, REQID:0b6bb55e-5ac3-4c92-9452-e0fc15a793dd, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:-5 X-CID-META: VersionHash:b14ad71, CLOUDID:32609b37-84c0-4f9a-9fbd-acd4a0e9ad0f, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 735172aac751471ba5a53f9cd890940c-20220614 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1450771963; Tue, 14 Jun 2022 09:16:42 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 14 Jun 2022 09:16:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Tue, 14 Jun 2022 09:16:41 +0800 From: Stanley Chu To: , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v2 4/8] scsi: ufs-mediatek: Fix the timing of configuring device regulators Date: Tue, 14 Jun 2022 09:16:35 +0800 Message-ID: <20220614011639.2825-5-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220614011639.2825-1-stanley.chu@mediatek.com> References: <20220614011639.2825-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: Po-Wen Kao Currently the LPM configurations of device regulators may not work since VCC is not disabled yet while ufs_mtk_vreg_set_lpm() is executed. Fix it by changing the timing of invoking ufs_mtk_vreg_set_lpm(). Reviewed-by: Stanley Chu Signed-off-by: Po-Wen Kao Signed-off-by: Stanley Chu --- drivers/ufs/host/ufs-mediatek.c | 60 ++++++++++++++++++++++++++++++--- 1 file changed, 55 insertions(+), 5 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 21d591925dc4..3b3fe5470b71 100755 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1082,7 +1082,6 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op, * ufshcd_suspend() re-enabling regulators while vreg is still * in low-power mode. */ - ufs_mtk_vreg_set_lpm(hba, true); err = ufs_mtk_mphy_power_on(hba, false); if (err) goto fail; @@ -1106,12 +1105,13 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) { int err; + if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) + ufs_mtk_vreg_set_lpm(hba, false); + err = ufs_mtk_mphy_power_on(hba, true); if (err) goto fail; - ufs_mtk_vreg_set_lpm(hba, false); - if (ufshcd_is_link_hibern8(hba)) { err = ufs_mtk_link_set_hpm(hba); if (err) @@ -1276,9 +1276,59 @@ static int ufs_mtk_remove(struct platform_device *pdev) return 0; } +int ufs_mtk_system_suspend(struct device *dev) +{ + int ret = 0; + struct ufs_hba *hba = dev_get_drvdata(dev); + + ret = ufshcd_system_suspend(dev); + + if (!ret) + ufs_mtk_vreg_set_lpm(hba, true); + + return ret; +} + +int ufs_mtk_system_resume(struct device *dev) +{ + int ret = 0; + struct ufs_hba *hba = dev_get_drvdata(dev); + + ufs_mtk_vreg_set_lpm(hba, false); + + ret = ufshcd_system_resume(dev); + + return ret; +} + +int ufs_mtk_runtime_suspend(struct device *dev) +{ + struct ufs_hba *hba = dev_get_drvdata(dev); + int ret = 0; + + ret = ufshcd_runtime_suspend(dev); + + if (!ret) + ufs_mtk_vreg_set_lpm(hba, true); + + return ret; +} + +int ufs_mtk_runtime_resume(struct device *dev) +{ + struct ufs_hba *hba = dev_get_drvdata(dev); + int ret = 0; + + ufs_mtk_vreg_set_lpm(hba, false); + + ret = ufshcd_runtime_resume(dev); + + return ret; +} + static const struct dev_pm_ops ufs_mtk_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(ufshcd_system_suspend, ufshcd_system_resume) - SET_RUNTIME_PM_OPS(ufshcd_runtime_suspend, ufshcd_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(ufs_mtk_system_suspend, ufs_mtk_system_resume) + SET_RUNTIME_PM_OPS(ufs_mtk_runtime_suspend, ufs_mtk_runtime_resume, NULL) .prepare = ufshcd_suspend_prepare, .complete = ufshcd_resume_complete, };