From patchwork Fri May 28 13:13:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chandrakanth Patil X-Patchwork-Id: 449806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_HEADER_CTYPE_ONLY, SPF_HELO_NONE, SPF_PASS, T_TVD_MIME_NO_HEADERS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 160D4C2B9F7 for ; Fri, 28 May 2021 13:14:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2075613EC for ; Fri, 28 May 2021 13:14:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235974AbhE1NPq (ORCPT ); Fri, 28 May 2021 09:15:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233711AbhE1NPp (ORCPT ); Fri, 28 May 2021 09:15:45 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D06AC061574 for ; Fri, 28 May 2021 06:14:10 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id u7so1619552plq.4 for ; Fri, 28 May 2021 06:14:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lJ+vhSTifZ67Y6OBEU2Ubh4NEYSQlr6F10hridOhSQg=; b=efPJnp3OAUh5Yv5Vzj1Hq3ADL8UnmYegwU3NpTpwoWMo2RHGNZpxO2XhI6NOuqdYhQ nd8oKA04wNOqst61ML+ow2gvjzwioLv1OH63eRuxabQ5pbiqCvVynFpu7/O1pavJrkHP NwfrLcrfJbDpaPCLi6uRVfG+8ibWCNniux6Tw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lJ+vhSTifZ67Y6OBEU2Ubh4NEYSQlr6F10hridOhSQg=; b=bb1R+RySroAcqLPAr5N9/FqyJk5YIaAjFgQJDFjZ6j8YfNdE/r3hBlds+xIvIiXK/P wEeq67DFEnbfcP0S/T+/+v8txvNxVnOd3yKkMRVZ70TyLNrsQPzD+F0lE8wDBWFfl9OA f4C/fs15Rt34822zAUw8Iv9Om4cTRPjnS/PWW3DjHWsHo7acIVRS8HO1bjT9cUF6wHG/ 6sXOhBQXikXGY3zNJBN1U1BRASCmMs0YM/4G4ccbY6uRbMACsQxLkSWvbn9m5ltYFgsd 8BZfWYrImZCE9RAiTjeTCSIMR+c32CO84uLaUUI2+9tubh+ISgCXuIcEGXZUmZ43Y+yW VN2w== X-Gm-Message-State: AOAM530MPkccPu8w2a2acZmeNhZax1Hmj+74O5kBoYGghsYo7pBwqJQ1 IcQp+IPN2pJi2up3gBuKElUSNCS3DKnlj7Mk+s/MxtGs0OhGpgwAJIkxR3QAecgJH06G4KfxZ1j XPjcPWt50JJZt3F+BjvPIHqHWBxvWJ6r2DN8qAVlC3sf5MO/3uRok5qHij7wnJK7/s+oXB6gLAa PZY5uABrx7eTIa744= X-Google-Smtp-Source: ABdhPJzh6/7iYzd2PdROWd8y9qRxt0y27bucLQXIuJRWQgz/OWBX3fF0qYpTkzPY0UbyLuRmaiRUUA== X-Received: by 2002:a17:902:d643:b029:ef:62cd:eeed with SMTP id y3-20020a170902d643b02900ef62cdeeedmr8130184plh.42.1622207649462; Fri, 28 May 2021 06:14:09 -0700 (PDT) Received: from dhcp-10-123-20-83.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id o2sm4238434pfu.80.2021.05.28.06.14.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 May 2021 06:14:08 -0700 (PDT) From: Chandrakanth Patil To: linux-scsi@vger.kernel.org Cc: kashyap.desai@broadcom.com, sumit.saxena@broadcom.com, Chandrakanth Patil , Tomas Henzl Subject: [PATCH v3 4/5] megaraid_sas: Handle missing interrupts while re-enabling IRQs Date: Fri, 28 May 2021 18:43:06 +0530 Message-Id: <20210528131307.25683-5-chandrakanth.patil@broadcom.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210528131307.25683-1-chandrakanth.patil@broadcom.com> References: <20210528131307.25683-1-chandrakanth.patil@broadcom.com> Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org While reenabling the IRQ after irq poll there may be a small window for the firmware to post the replies with interrupts raised. In that case, driver will not see the interrupts which lead to IOs timeout. This issue hits only when there is a high IOs completion on a single reply queue, which forces the driver to switch between the interrupt and IRQ context. To fix this, driver will process the reply queue one more time after enabling the IRQ. Link: https://lore.kernel.org/linux-scsi/20201102072746.27410-1-sreekanth.reddy@broadcom.com/ Cc: Tomas Henzl Reported-by: kernel test robot Signed-off-by: Chandrakanth Patil Signed-off-by: Sumit Saxena --- drivers/scsi/megaraid/megaraid_sas_fusion.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c index f79c19010c92..142e60741094 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fusion.c +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c @@ -3745,6 +3745,7 @@ static void megasas_sync_irqs(unsigned long instance_addr) if (irq_ctx->irq_poll_scheduled) { irq_ctx->irq_poll_scheduled = false; enable_irq(irq_ctx->os_irq); + complete_cmd_fusion(instance, irq_ctx->MSIxIndex, irq_ctx); } } } @@ -3776,6 +3777,7 @@ int megasas_irqpoll(struct irq_poll *irqpoll, int budget) irq_poll_complete(irqpoll); irq_ctx->irq_poll_scheduled = false; enable_irq(irq_ctx->os_irq); + complete_cmd_fusion(instance, irq_ctx->MSIxIndex, irq_ctx); } return num_entries; @@ -3792,6 +3794,7 @@ megasas_complete_cmd_dpc_fusion(unsigned long instance_addr) { struct megasas_instance *instance = (struct megasas_instance *)instance_addr; + struct megasas_irq_context *irq_ctx = NULL; u32 count, MSIxIndex; count = instance->msix_vectors > 0 ? instance->msix_vectors : 1; @@ -3800,8 +3803,10 @@ megasas_complete_cmd_dpc_fusion(unsigned long instance_addr) if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) return; - for (MSIxIndex = 0 ; MSIxIndex < count; MSIxIndex++) - complete_cmd_fusion(instance, MSIxIndex, NULL); + for (MSIxIndex = 0 ; MSIxIndex < count; MSIxIndex++) { + irq_ctx = &instance->irq_context[MSIxIndex]; + complete_cmd_fusion(instance, MSIxIndex, irq_ctx); + } } /**