From patchwork Wed Nov 29 08:28:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Can Guo X-Patchwork-Id: 748456 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="jxRUkFNZ" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 263CA1BCB; Wed, 29 Nov 2023 00:29:15 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AT87TKZ015007; Wed, 29 Nov 2023 08:28:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=XXKLvo3XMl+H+NTDwg2NZExDkEPfW6/0ym+VBsHZItg=; b=jxRUkFNZSAKRoNKgmRTzaiwNcd7txOrY5BSkTdDiT4srhsssP6Bw0HVx0PGNSFCf/ARQ 6DBXA+Dg1c6C10g7MHZVrh5BDdftG0tcwEhai0p4cu7j5JHl6dPqdeoQhAqu4YF0k9bS zYc6x32+FybQpE9jTuXxg7xX/3UpNEX0UKiQPkHqPCvoVPQOeqYS6WjhhIU6L+lZ55TQ GT/Es7IydTjWqJrV42zHDJEtt0IQ6OhmFhHdEVIk5DPU4zlNxtrLpnFMaLllua1uNaGj ZLRLT7/16OZx5F1oMwNaV9dle98nse8l9FFLOe8f90O0xWUxjqlGawXqjOUqepJxLiXL jg== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3up1gt81bt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Nov 2023 08:28:54 +0000 Received: from pps.filterd (NASANPPMTA05.qualcomm.com [127.0.0.1]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3AT8RF5u026164; Wed, 29 Nov 2023 08:28:53 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NASANPPMTA05.qualcomm.com (PPS) with ESMTP id 3unmeuy51g-1; Wed, 29 Nov 2023 08:28:53 +0000 Received: from NASANPPMTA05.qualcomm.com (NASANPPMTA05.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3AT8ScXT028464; Wed, 29 Nov 2023 08:28:53 GMT Received: from stor-dylan.qualcomm.com (stor-dylan.qualcomm.com [192.168.140.207]) by NASANPPMTA05.qualcomm.com (PPS) with ESMTP id 3AT8SrER029022; Wed, 29 Nov 2023 08:28:53 +0000 Received: by stor-dylan.qualcomm.com (Postfix, from userid 359480) id E02D520A5D; Wed, 29 Nov 2023 00:28:52 -0800 (PST) From: Can Guo To: quic_cang@quicinc.com, bvanassche@acm.org, mani@kernel.org, adrian.hunter@intel.com, cmd4@qualcomm.com, beanhuo@micron.com, avri.altman@wdc.com, junwoo80.lee@samsung.com, martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , "James E.J. Bottomley" , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v6 02/10] scsi: ufs: ufs-qcom: No need to set hs_rate after ufshcd_init_host_param() Date: Wed, 29 Nov 2023 00:28:27 -0800 Message-Id: <1701246516-11626-3-git-send-email-quic_cang@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1701246516-11626-1-git-send-email-quic_cang@quicinc.com> References: <1701246516-11626-1-git-send-email-quic_cang@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: miQMxyRgJq2XOZ69EbmnhfxH2lW8JiF- X-Proofpoint-ORIG-GUID: miQMxyRgJq2XOZ69EbmnhfxH2lW8JiF- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-29_06,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 malwarescore=0 adultscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311290062 Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: In ufs_qcom_pwr_change_notify(), host_params.hs_rate has been set to PA_HS_MODE_B by ufshcd_init_host_param(), hence remove the duplicated line of work. Meanwhile, removed the macro UFS_QCOM_LIMIT_HS_RATE as it is only used here. Reviewed-by: Nitin Rawat Reviewed-by: Manivannan Sadhasivam Signed-off-by: Can Guo Reviewed-by: Andrew Halaney --- drivers/ufs/host/ufs-qcom.c | 1 - drivers/ufs/host/ufs-qcom.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 197c5a5..c21ff2c 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -909,7 +909,6 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba, switch (status) { case PRE_CHANGE: ufshcd_init_host_params(&host_params); - host_params.hs_rate = UFS_QCOM_LIMIT_HS_RATE; /* This driver only supports symmetic gear setting i.e., hs_tx_gear == hs_rx_gear */ host_params.hs_tx_gear = host_params.hs_rx_gear = ufs_qcom_get_hs_gear(hba); diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 9950a00..82cd143 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -27,8 +27,6 @@ #define SLOW 1 #define FAST 2 -#define UFS_QCOM_LIMIT_HS_RATE PA_HS_MODE_B - /* QCOM UFS host controller vendor specific registers */ enum { REG_UFS_SYS1CLK_1US = 0xC0,