From patchwork Mon May 10 14:17:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 433150 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2895848jao; Mon, 10 May 2021 07:26:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyxyNayur2ZoR1YD5bIwMCSrrHmaIKamzkmi6MFb93lvfocumZEPFu+t9f5JPpYCEu3FeLS X-Received: by 2002:a05:6e02:218a:: with SMTP id j10mr3851582ila.279.1620656787316; Mon, 10 May 2021 07:26:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620656787; cv=none; d=google.com; s=arc-20160816; b=zMfMRFbimWTeYnDOitDmXZpn7qW8SaDsUXQDsAggF3ouX+z9mukBDIG/jMmlfvNTup ZZtYNmiRMrSIlbYSVOv/sQCZBXaAPamyDE+7fx/F5F8jISMFNCs044ZsITcqimAINhv9 wNwhyC9qiTO/eF/iK/YgOBCB5z5o1KQ+t8CcQHEpCglrLwFD4gs49tG5mPk//1lq1EAY Z6NQGBgiBxGkOpbWZfL8jHeqvH6PSIDAgpgdxSMlCpQ4A/XOk4Ilm56FNRDA22As7/Wv XKbnL0UfcBZo+nP53Mhz67LxpVW/e0CIZEnHMJwi0uAYXYt/562Y8vmemVKe/KcB+SqD Sv+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=tRa9OT4rjiKwVt067L+S8Ar56X9w3FzmXKxh5URW9AI=; b=jmnNddz/k4ZR3kNG3bjIrS9IL2QSHscXufZ5cHrTXyYpeEmo9fSYtHK1WllmVLg0FR Zzpqm/Xe6Hpybq75jmSqvQA2jV3rrU0Q3esif9BYphnvRnzcOaWNK9dJ4Ls10LHvUclr cEjUDtB6E0HfiOYnqaWRUCMhZUO+5kdE5dGUk81NnnL19rCQTqCbT+/awnRL2oQQPwvD J8F8usOXgVgIA2g3dT8+XYeClTlEAW/f9zD2swqPiFwRAKZnwBdq/4aVd4ROfdKOptOG /WAMDU3PBcv+ha20siqd1ryd5TeL1wfXle0tVVD6CxWURPb3EVhjFbh+/tTCqmJaNldr HKtA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a13si13610863ilr.121.2021.05.10.07.26.27 for ; Mon, 10 May 2021 07:26:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236497AbhEJO1A (ORCPT ); Mon, 10 May 2021 10:27:00 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2755 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235153AbhEJOXq (ORCPT ); Mon, 10 May 2021 10:23:46 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Ff38H430SzqTrc; Mon, 10 May 2021 22:19:11 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.498.0; Mon, 10 May 2021 22:22:25 +0800 From: John Garry To: , , , , CC: , , , , , , John Garry Subject: [PATCH v2 02/15] iova: Allow rcache range upper limit to be flexible Date: Mon, 10 May 2021 22:17:16 +0800 Message-ID: <1620656249-68890-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1620656249-68890-1-git-send-email-john.garry@huawei.com> References: <1620656249-68890-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Some LLDs may request DMA mappings whose IOVA length exceeds that of the current rcache upper limit. This means that allocations for those IOVAs will never be cached, and always must be allocated and freed from the RB tree per DMA mapping cycle. This has a significant effect on performance, more so since commit 4e89dce72521 ("iommu/iova: Retry from last rb tree node if iova search fails"), as discussed at [0]. As a first step towards allowing the rcache range upper limit be configured, hold this value in the IOVA rcache structure, and allocate the rcaches separately. [0] https://lore.kernel.org/linux-iommu/20210129092120.1482-1-thunder.leizhen@huawei.com/ Signed-off-by: John Garry --- drivers/iommu/dma-iommu.c | 2 +- drivers/iommu/iova.c | 23 +++++++++++++++++------ include/linux/iova.h | 4 ++-- 3 files changed, 20 insertions(+), 9 deletions(-) -- 2.26.2 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 7bcdd1205535..f6d3302bb829 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -432,7 +432,7 @@ static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain, * rounding up anything cacheable to make sure that can't happen. The * order of the unadjusted size will still match upon freeing. */ - if (iova_len < (1 << (IOVA_RANGE_CACHE_MAX_SIZE - 1))) + if (iova_len < (1 << (iovad->rcache_max_size - 1))) iova_len = roundup_pow_of_two(iova_len); dma_limit = min_not_zero(dma_limit, dev->bus_dma_limit); diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index b7ecd5b08039..0e4c0e55178a 100644 --- a/drivers/iommu/iova.c +++ b/drivers/iommu/iova.c @@ -15,6 +15,8 @@ /* The anchor node sits above the top of the usable address space */ #define IOVA_ANCHOR ~0UL +#define IOVA_RANGE_CACHE_MAX_SIZE 6 /* log of max cached IOVA range size (in pages) */ + static bool iova_rcache_insert(struct iova_domain *iovad, unsigned long pfn, unsigned long size); @@ -877,7 +879,14 @@ static void init_iova_rcaches(struct iova_domain *iovad) unsigned int cpu; int i; - for (i = 0; i < IOVA_RANGE_CACHE_MAX_SIZE; ++i) { + iovad->rcache_max_size = IOVA_RANGE_CACHE_MAX_SIZE; + + iovad->rcaches = kcalloc(iovad->rcache_max_size, + sizeof(*iovad->rcaches), GFP_KERNEL); + if (!iovad->rcaches) + return; + + for (i = 0; i < iovad->rcache_max_size; ++i) { rcache = &iovad->rcaches[i]; spin_lock_init(&rcache->lock); rcache->depot_size = 0; @@ -952,7 +961,7 @@ static bool iova_rcache_insert(struct iova_domain *iovad, unsigned long pfn, { unsigned int log_size = order_base_2(size); - if (log_size >= IOVA_RANGE_CACHE_MAX_SIZE) + if (log_size >= iovad->rcache_max_size) return false; return __iova_rcache_insert(iovad, &iovad->rcaches[log_size], pfn); @@ -1008,7 +1017,7 @@ static unsigned long iova_rcache_get(struct iova_domain *iovad, { unsigned int log_size = order_base_2(size); - if (log_size >= IOVA_RANGE_CACHE_MAX_SIZE) + if (log_size >= iovad->rcache_max_size) return 0; return __iova_rcache_get(&iovad->rcaches[log_size], limit_pfn - size); @@ -1024,7 +1033,7 @@ static void free_iova_rcaches(struct iova_domain *iovad) unsigned int cpu; int i, j; - for (i = 0; i < IOVA_RANGE_CACHE_MAX_SIZE; ++i) { + for (i = 0; i < iovad->rcache_max_size; ++i) { rcache = &iovad->rcaches[i]; for_each_possible_cpu(cpu) { cpu_rcache = per_cpu_ptr(rcache->cpu_rcaches, cpu); @@ -1035,6 +1044,8 @@ static void free_iova_rcaches(struct iova_domain *iovad) for (j = 0; j < rcache->depot_size; ++j) iova_magazine_free(rcache->depot[j]); } + + kfree(iovad->rcaches); } /* @@ -1047,7 +1058,7 @@ static void free_cpu_cached_iovas(unsigned int cpu, struct iova_domain *iovad) unsigned long flags; int i; - for (i = 0; i < IOVA_RANGE_CACHE_MAX_SIZE; ++i) { + for (i = 0; i < iovad->rcache_max_size; ++i) { rcache = &iovad->rcaches[i]; cpu_rcache = per_cpu_ptr(rcache->cpu_rcaches, cpu); spin_lock_irqsave(&cpu_rcache->lock, flags); @@ -1066,7 +1077,7 @@ static void free_global_cached_iovas(struct iova_domain *iovad) unsigned long flags; int i, j; - for (i = 0; i < IOVA_RANGE_CACHE_MAX_SIZE; ++i) { + for (i = 0; i < iovad->rcache_max_size; ++i) { rcache = &iovad->rcaches[i]; spin_lock_irqsave(&rcache->lock, flags); for (j = 0; j < rcache->depot_size; ++j) { diff --git a/include/linux/iova.h b/include/linux/iova.h index 71d8a2de6635..9974e1d3e2bc 100644 --- a/include/linux/iova.h +++ b/include/linux/iova.h @@ -25,7 +25,6 @@ struct iova { struct iova_magazine; struct iova_cpu_rcache; -#define IOVA_RANGE_CACHE_MAX_SIZE 6 /* log of max cached IOVA range size (in pages) */ #define MAX_GLOBAL_MAGS 32 /* magazines per bin */ struct iova_rcache { @@ -74,6 +73,7 @@ struct iova_domain { unsigned long start_pfn; /* Lower limit for this domain */ unsigned long dma_32bit_pfn; unsigned long max32_alloc_size; /* Size of last failed allocation */ + unsigned long rcache_max_size; /* Upper limit of cached IOVA RANGE */ struct iova_fq __percpu *fq; /* Flush Queue */ atomic64_t fq_flush_start_cnt; /* Number of TLB flushes that @@ -83,7 +83,6 @@ struct iova_domain { have been finished */ struct iova anchor; /* rbtree lookup anchor */ - struct iova_rcache rcaches[IOVA_RANGE_CACHE_MAX_SIZE]; /* IOVA range caches */ iova_flush_cb flush_cb; /* Call-Back function to flush IOMMU TLBs */ @@ -96,6 +95,7 @@ struct iova_domain { atomic_t fq_timer_on; /* 1 when timer is active, 0 when not */ struct hlist_node cpuhp_dead; + struct iova_rcache *rcaches; /* IOVA range caches */ }; static inline unsigned long iova_size(struct iova *iova)