From patchwork Tue Sep 1 11:13:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 248869 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4318013ilg; Tue, 1 Sep 2020 07:57:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxkm+2aGQZ7WZ14EKKYbU3D/8zP5QWJUOSakbzkHE4zX+CCZYWGRqhhqZaUYhO1jeuf8iv3 X-Received: by 2002:a17:906:17c5:: with SMTP id u5mr1721677eje.453.1598972242208; Tue, 01 Sep 2020 07:57:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598972242; cv=none; d=google.com; s=arc-20160816; b=aD/PSGkW/nHav8LzUMySr3Pd73jz7iXVWxuQgcRHk8XAdqgTuRReAyEHto70SvO8CR 5w49//YJMpvFDOd2Rz1RZmY/K8lrmNnwBEO82bgI6/gGCe/fmZu5RWUZ+XhXW4CmHf8g b6MQmAfBbcq8bN+e1TjvjdHLFh8p3xDdKa0exQwmrWclg2Ms9igzSZBfjvMJ1mStoA8M QVfdAQ4QOvfA+iUHngKBAENaystNxi90lUDXImUi6VHLjf1tJVtv19puU9dOdExbSx86 Q+iW9Aik4OqiL3IieNeyc4qf9u5ffYN+HsfKzXp3QiMhCtNEYyoTfMKeBF/GDWrjpboZ RthA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=7FrJWCUblZrnoXgudbyioHHALVELoWgvuaCavfX85l8=; b=AdWONy/pkRHA3HENP9F8QzodWcSShXiJji8siSaYIJpbJPY0PsBjK8P6lBM9vHPNiO Mj1jWSW61CtNiYhyZMvX+19uQNl8DajtvV7ILMoWWThHkL70l1/Gc1NGjsUrhq9vQ22X k3254bD8hx037H7PsNPVjrhI3mZToo8KQqGWyxHzhXnWZHT1HtlXdhoILLilkILEECBy 8bsHF/vdSnDcAqmBewJdPVNNQAiQyHm2N6N2W+/b8L1gWcl4hFy4ZM52LsZ2VQ6XyviT Fr7Jqs6BnGdGJpjygQvpp2NlMWcO9DfTWftsxHoYqkL33U8lS0LDnMiyROMaRO1DIAZY FEXA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id hh13si755309ejb.706.2020.09.01.07.57.22 for ; Tue, 01 Sep 2020 07:57:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728116AbgIAOzT (ORCPT ); Tue, 1 Sep 2020 10:55:19 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:44772 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726997AbgIALeb (ORCPT ); Tue, 1 Sep 2020 07:34:31 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 4633EDAAF5E80908D7C9; Tue, 1 Sep 2020 19:17:07 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Tue, 1 Sep 2020 19:16:58 +0800 From: John Garry To: , CC: , , , Luo Jiaxing , John Garry Subject: [PATCH 3/8] scsi: hisi_sas: Do not modify upper fields of PROG_PHY_LINK_RATE reg Date: Tue, 1 Sep 2020 19:13:05 +0800 Message-ID: <1598958790-232272-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1598958790-232272-1-git-send-email-john.garry@huawei.com> References: <1598958790-232272-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: Luo Jiaxing When we update register of PROG_PHY_LINK_RATE to set linkrate for a phy, we used a hard-coded initial value instead of getting the current value from register. We had assumed that this register would not be modified, but in fact it was partially modified in new version of hardware. So hard-coded value we used change default value of register to a wrong setting and make SAS controller can not change linkrate for phy at new version of hardware. So we delete hard-coded value and always read the latest value of register before we update part of it. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) -- 2.26.2 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 05b60cdf6b24..b7d94f2e49ae 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -191,6 +191,8 @@ #define PHY_CFG_PHY_RST_OFF 3 #define PHY_CFG_PHY_RST_MSK (0x1 << PHY_CFG_PHY_RST_OFF) #define PROG_PHY_LINK_RATE (PORT_BASE + 0x8) +#define CFG_PROG_PHY_LINK_RATE_OFF 0 +#define CFG_PROG_PHY_LINK_RATE_MSK (0xff << CFG_PROG_PHY_LINK_RATE_OFF) #define CFG_PROG_OOB_PHY_LINK_RATE_OFF 8 #define CFG_PROG_OOB_PHY_LINK_RATE_MSK (0xf << CFG_PROG_OOB_PHY_LINK_RATE_OFF) #define PHY_CTRL (PORT_BASE + 0x14) @@ -598,20 +600,19 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba) hisi_sas_write32(hisi_hba, HYPER_STREAM_ID_EN_CFG, 1); for (i = 0; i < hisi_hba->n_phy; i++) { + enum sas_linkrate max; struct hisi_sas_phy *phy = &hisi_hba->phy[i]; struct asd_sas_phy *sas_phy = &phy->sas_phy; - u32 prog_phy_link_rate = 0x800; + u32 prog_phy_link_rate = hisi_sas_phy_read32(hisi_hba, i, + PROG_PHY_LINK_RATE); + prog_phy_link_rate &= ~CFG_PROG_PHY_LINK_RATE_MSK; if (!sas_phy->phy || (sas_phy->phy->maximum_linkrate < - SAS_LINK_RATE_1_5_GBPS)) { - prog_phy_link_rate = 0x855; - } else { - enum sas_linkrate max = sas_phy->phy->maximum_linkrate; - - prog_phy_link_rate = - hisi_sas_get_prog_phy_linkrate_mask(max) | - 0x800; - } + SAS_LINK_RATE_1_5_GBPS)) + max = SAS_LINK_RATE_12_0_GBPS; + else + max = sas_phy->phy->maximum_linkrate; + prog_phy_link_rate |= hisi_sas_get_prog_phy_linkrate_mask(max); hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE, prog_phy_link_rate); hisi_sas_phy_write32(hisi_hba, i, SERDES_CFG, 0xffc00); @@ -2501,8 +2502,10 @@ static void phy_set_linkrate_v3_hw(struct hisi_hba *hisi_hba, int phy_no, struct sas_phy_linkrates *r) { enum sas_linkrate max = r->maximum_linkrate; - u32 prog_phy_link_rate = 0x800; + u32 prog_phy_link_rate = hisi_sas_phy_read32(hisi_hba, phy_no, + PROG_PHY_LINK_RATE); + prog_phy_link_rate &= ~CFG_PROG_PHY_LINK_RATE_MSK; prog_phy_link_rate |= hisi_sas_get_prog_phy_linkrate_mask(max); hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, prog_phy_link_rate);