From patchwork Tue Sep 1 11:13:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 248845 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4135254ilg; Tue, 1 Sep 2020 04:35:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxTYALZ4fSj7DFlWdOMe9f91S4tX9JV5yDQ17hoiPaK21l03iscTwoNKRfOVwv0yO/4K4yp X-Received: by 2002:aa7:c549:: with SMTP id s9mr1384977edr.58.1598960121388; Tue, 01 Sep 2020 04:35:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598960121; cv=none; d=google.com; s=arc-20160816; b=yAl2u9zHHvIcLDjypE5qP+esWYVQ0ScLHfu0g+1t3cB8g4SzXBlcVy0ENcoRkdbPdo 9/eH63EOfMAP/nPpuLoDit1BaBcHZy3vdBkBri+CkphVZeYciQKh/8UPWJoch6zGkIA3 DQhlr7MkLIjkreUi/Uydnx5HT9pHxT+I+im+4T7i+XUhTn/IPgCc9wddHjm5kagNfuWh pxp3akP/Wo/bzj26UcVBS6+BAVowWcSVimlKm6+9Ds+HILHBU6lttU2UpCk3EPeAe1TR XOlRKYBxMbYyPLzyMXwidEt2QyK0e7zANtpTzzVDj9I1OFpgd9eN6jOoi7PeudlWf5nR grJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=ouymIRPwifbgmYqmOBVUZJLPHvrr3eONs7ulCvSfpqk=; b=BNpwmv+eT1tVoQ9gxeSUmhOi4WADCIfF8yHe0D8CKt8hRtKc21zHGhrsgQxn7v4l5A Y9l4cVk45+141XekSZKDHHusVM0yoNvh3UQxzo6YfwwLZim0ixvA3bP/f1Ed/AVEbTX5 itTPeC0JlJsC87ynwazhuvRNpRg7VyHvI+JSqQM2fvWwq7VkhspaMc6Qr/UqcdDaPYjt Y8mZ+wPicsAOB3lXCYvzmTXdAFq7akEaDDGBPRFgu4kdU2jzx3QaRwNvRYd4p8Y2dwEg UIkG4M3EYr2XdVzmDhlkYeljMVpueLfAqTRhDD+e6eL70C37i2j8gczlvjlA43ncWB7g LnRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d7si465390ejc.635.2020.09.01.04.35.21 for ; Tue, 01 Sep 2020 04:35:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727035AbgIALfQ (ORCPT ); Tue, 1 Sep 2020 07:35:16 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:43740 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726537AbgIALeh (ORCPT ); Tue, 1 Sep 2020 07:34:37 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 69B232334A629702BB85; Tue, 1 Sep 2020 19:17:07 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Tue, 1 Sep 2020 19:16:58 +0800 From: John Garry To: , CC: , , , Luo Jiaxing , John Garry Subject: [PATCH 2/8] scsi: hisi_sas: Modify macro name for OOB phy linkrate Date: Tue, 1 Sep 2020 19:13:04 +0800 Message-ID: <1598958790-232272-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1598958790-232272-1-git-send-email-john.garry@huawei.com> References: <1598958790-232272-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: Luo Jiaxing The macro for OOB phy linkrate is named as CFG_PROG_PHY_LINK_RATE_*, but it's not correct. To avoid some misunderstand, we modify it to a correct naming. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) -- 2.26.2 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 60adf5c32143..05b60cdf6b24 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -191,8 +191,8 @@ #define PHY_CFG_PHY_RST_OFF 3 #define PHY_CFG_PHY_RST_MSK (0x1 << PHY_CFG_PHY_RST_OFF) #define PROG_PHY_LINK_RATE (PORT_BASE + 0x8) -#define CFG_PROG_PHY_LINK_RATE_OFF 8 -#define CFG_PROG_PHY_LINK_RATE_MSK (0xf << CFG_PROG_PHY_LINK_RATE_OFF) +#define CFG_PROG_OOB_PHY_LINK_RATE_OFF 8 +#define CFG_PROG_OOB_PHY_LINK_RATE_MSK (0xf << CFG_PROG_OOB_PHY_LINK_RATE_OFF) #define PHY_CTRL (PORT_BASE + 0x14) #define PHY_CTRL_RESET_OFF 0 #define PHY_CTRL_RESET_MSK (0x1 << PHY_CTRL_RESET_OFF) @@ -2998,8 +2998,8 @@ static void hisi_sas_bist_test_restore_v3_hw(struct hisi_hba *hisi_hba) /* restore the linkrate */ reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, PROG_PHY_LINK_RATE); /* init OOB link rate as 1.5 Gbits */ - reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK; - reg_val |= (0x8 << CFG_PROG_PHY_LINK_RATE_OFF); + reg_val &= ~CFG_PROG_OOB_PHY_LINK_RATE_MSK; + reg_val |= (0x8 << CFG_PROG_OOB_PHY_LINK_RATE_OFF); hisi_sas_phy_write32(hisi_hba, phy_id, PROG_PHY_LINK_RATE, reg_val); /* enable PHY */ @@ -3027,8 +3027,8 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) /* set linkrate of bit test*/ reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, PROG_PHY_LINK_RATE); - reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK; - reg_val |= (linkrate << CFG_PROG_PHY_LINK_RATE_OFF); + reg_val &= ~CFG_PROG_OOB_PHY_LINK_RATE_MSK; + reg_val |= (linkrate << CFG_PROG_OOB_PHY_LINK_RATE_OFF); hisi_sas_phy_write32(hisi_hba, phy_id, PROG_PHY_LINK_RATE, reg_val); @@ -3050,8 +3050,7 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CODE, SAS_PHY_BIST_CODE_INIT); - hisi_sas_phy_write32(hisi_hba, phy_id, - SAS_PHY_BIST_CODE1, + hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CODE1, SAS_PHY_BIST_CODE1_INIT); mdelay(100);