From patchwork Fri Jun 12 13:58:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guillaume Tucker X-Patchwork-Id: 187848 Delivered-To: patch@linaro.org Received: by 2002:a54:30ca:0:0:0:0:0 with SMTP id e10csp520987ecs; Fri, 12 Jun 2020 06:59:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzQkn++bLdsrOQRNdolTROHR5nyEccgD0lFcxIEcEcIL51uWZ/M8m92h73HcYxs4yFctwTd X-Received: by 2002:a17:906:e2d5:: with SMTP id gr21mr12814667ejb.219.1591970355539; Fri, 12 Jun 2020 06:59:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591970355; cv=none; d=google.com; s=arc-20160816; b=AmifUQp1Vr4QqaxHoyrVDj9w9ClcBgBH55kqyELe2HXEeCn5pMNIHdNQ4bTrpXIMeC WCbk6tyGdhmd3j0yaZiDVttk9pf6M2WU9CzIIiSXrrUZ3yP/F7h75DFaKUSvFWfU7s2q 71mMKSmqOkRiqvdzsDw7YgVamEdmb7Q5/2Y5yY9oH48qMh4fFzVmWf4ep6diM86MUl6T JQK1nYnfhZ/z38NvOUAJ2Cwyr7qeDmoEWhm4Y7o92BKSPFOmln33fhosS/1GO7QjfEOt do/MYglTh9NEZE650bH/r4xx6DM5IoI1O+YRKlQ5FgNSTN9qVV0Uw77CODHAWnPVvtcA HH6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=iCEpGPOJczj9ymzEOIbQa/a5XDV65Bl9SLxO/6Sw878=; b=QVIyDUhLAOcQc4QByaE0LcMAF2I15F6F8+81CQKok/UROY/00KjbvhkvqvTCtEjoZY x03lW+mxidVV2q9LF9/FWM8o6yCVZIZ19vrlyhmMj0SZP1zUd4ey//fGAw7BmvY/RQbb 7IPfsZ6Js3tNfvZBhDcnA4amc0M15NmltA1grWCI1q1EDp+nOVUBGMC3E1V7aj5ygTjA uYRhyuZxXXKgejCazzIGytxQRSArIjXLK0adutKnkg6oIZUe88zS/Gg5qd3OopvIH07t ThDXFYaWr4Tkdupqzbjtejs++Ufw9mps/lm/JPl43CiHOyNJSEbquO5E62KGsF8AieXD 95tA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q27si4065251edb.205.2020.06.12.06.59.15; Fri, 12 Jun 2020 06:59:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726449AbgFLN7K (ORCPT + 3 others); Fri, 12 Jun 2020 09:59:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726109AbgFLN7H (ORCPT ); Fri, 12 Jun 2020 09:59:07 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3449EC03E96F; Fri, 12 Jun 2020 06:59:06 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: gtucker) with ESMTPSA id 3ED132A23FB From: Guillaume Tucker To: Russell King , Kukjin Kim , Krzysztof Kozlowski Cc: Kyungmin Park , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH] ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val Date: Fri, 12 Jun 2020 14:58:37 +0100 Message-Id: X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This "alert" error message can be seen on exynos4412-odroidx2: L2C: platform modifies aux control register: 0x02070000 -> 0x3e470001 L2C: platform provided aux values permit register corruption. Followed by this plain error message: L2C-310: enabling full line of zeros but not enabled in Cortex-A9 To fix it, don't set the L310_AUX_CTRL_FULL_LINE_ZERO flag (bit 0) in the default value of l2c_aux_val. It may instead be enabled when applicable by the logic in l2c310_enable() if the attribute "arm,full-line-zero-disable" was set in the device tree. The initial commit that introduced this default value was in v2.6.38: 1cf0eb799759 "ARM: S5PV310: Add L2 cache init function in cpu.c" However, the code to set the L310_AUX_CTRL_FULL_LINE_ZERO flag and manage that feature was added much later and the default value was not updated then. So this seems to have been a subtle oversight especially since enabling it only in the cache and not in the A9 core doesn't actually prevent the platform from running. According to the TRM, the opposite would be a real issue, if the feature was enabled in the A9 core but not in the cache controller. Reported-by: "kernelci.org bot" Signed-off-by: Guillaume Tucker --- arch/arm/mach-exynos/exynos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.20.1 diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 7a8d1555db40..36c37444485a 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -193,7 +193,7 @@ static void __init exynos_dt_fixup(void) } DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") - .l2c_aux_val = 0x3c400001, + .l2c_aux_val = 0x3c400000, .l2c_aux_mask = 0xc20fffff, .smp = smp_ops(exynos_smp_ops), .map_io = exynos_init_io,