From patchwork Tue Apr 19 12:30:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 66094 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1821744qge; Tue, 19 Apr 2016 05:32:27 -0700 (PDT) X-Received: by 10.66.136.10 with SMTP id pw10mr3640037pab.113.1461069146942; Tue, 19 Apr 2016 05:32:26 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y7si14708042pav.225.2016.04.19.05.32.26; Tue, 19 Apr 2016 05:32:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753983AbcDSMcZ (ORCPT + 4 others); Tue, 19 Apr 2016 08:32:25 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:45585 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752938AbcDSMcY (ORCPT ); Tue, 19 Apr 2016 08:32:24 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u3JCUpdm000753; Tue, 19 Apr 2016 07:30:51 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3JCUorC001187; Tue, 19 Apr 2016 07:30:50 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Tue, 19 Apr 2016 07:30:49 -0500 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3JCUej2014924; Tue, 19 Apr 2016 07:30:40 -0500 Subject: Re: [PATCH v5 39/50] mtd: nand: omap2: switch to mtd_ooblayout_ops To: Boris Brezillon References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-40-git-send-email-boris.brezillon@free-electrons.com> <5714F011.5080409@ti.com> <20160418170518.363f732d@bbrezillon> <57160862.90603@ti.com> <20160419132206.5d909f7e@bbrezillon> CC: David Woodhouse , Brian Norris , , Richard Weinberger , , Krzysztof Kozlowski , Harvey Hunt , Nicolas Ferre , Stefan Agner , , Alexandre Belloni , punnaiah choudary kalluri , Robert Jarzmik , , Archit Taneja , , Kamal Dasu , Josh Wu , Chen-Yu Tsai , Kukjin Kim , , Ezequiel Garcia , Huang Shijie , Jean-Christophe Plagniol-Villard , Haojian Zhuang , Han Xu , , Priit Laes , Greg Kroah-Hartman , , Ralf Baechle , Wenyou Yang , Kyungmin Park , , Maxime Ripard , Daniel Mack From: Roger Quadros Message-ID: <571624EF.9060707@ti.com> Date: Tue, 19 Apr 2016 15:30:39 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <20160419132206.5d909f7e@bbrezillon> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org On 19/04/16 14:22, Boris Brezillon wrote: > Hi Roger, > > On Tue, 19 Apr 2016 13:28:50 +0300 > Roger Quadros wrote: > >>> @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>> nand_chip->ecc.correct = omap_correct_data; >>> mtd_set_ooblayout(mtd, &omap_ooblayout_ops); >>> oobbytes_per_step = nand_chip->ecc.bytes; >>> + >>> + if (nand_chip->options & NAND_BUSWIDTH_16) >>> + min_oobbytes = 1; >> >> Shouldn't this have been >> if (!(nand_chip->options & NAND_BUSWIDTH_16) >> min_oobbytes = 1; >> ? > > Yep. > >> >>> break; >>> >>> case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: >>> @@ -2038,10 +2047,8 @@ static int omap_nand_probe(struct platform_device *pdev) >>> } >>> >>> /* check if NAND device's OOB is enough to store ECC signatures */ >>> - min_oobbytes = (oobbytes_per_step * >>> - (mtd->writesize / nand_chip->ecc.size)) + >>> - (nand_chip->options & NAND_BUSWIDTH_16 ? >>> - BADBLOCK_MARKER_LENGTH : 1); >>> + min_oobbytes += (oobbytes_per_step * >>> + (mtd->writesize / nand_chip->ecc.size)); >>> if (mtd->oobsize < min_oobbytes) { >>> dev_err(&info->pdev->dev, >>> "not enough OOB bytes required = %d, available=%d\n", >>> >> >> After the above changes BCH with HW ECC worked fine but BCH with SW ECC still failed. >> I had to fix it up with the below patch. This is mainly because chip->ecc.steps wasn't >> yet initialized before calling nand_bch_init(). >> >> After the below patch it worked fine with bch4 (hw & sw), bch8 (hw & sw) and ham1. >> I couldn't yet verify bch16 though. > I just verified that bch16 works as well. > Thanks for the fix, but I'd prefer fixing the bug for all soft BCH > users. > > Could you try this patch? I tried your patch and it worked fine. You will still need the below change to omap2.c -- cheers, -roger -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0abfba6..33c8fde 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1715,7 +1715,7 @@ static int omap_sw_ooblayout_free(struct mtd_info *mtd, int section, struct nand_chip *chip = mtd_to_nand(mtd); int off = BADBLOCK_MARKER_LENGTH; - if (section) + if (section >= chip->ecc.steps) return -ERANGE; /*