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Fri, 25 Apr 2025 06:29:03 -0700 (PDT) Received: from localhost.localdomain ([110.44.101.8]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-309f7752a03sm1564313a91.18.2025.04.25.06.28.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Apr 2025 06:29:03 -0700 (PDT) From: Anand Moon To: Chanwoo Choi , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Alim Akhtar , linux-kernel@vger.kernel.org (open list:MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BO...), linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES), linux-samsung-soc@vger.kernel.org (open list:ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES) Cc: Anand Moon Subject: [PATCH v1 09/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos5250 snow Date: Fri, 25 Apr 2025 18:56:29 +0530 Message-ID: <20250425132727.5160-10-linux.amoon@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250425132727.5160-1-linux.amoon@gmail.com> References: <20250425132727.5160-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The MAX77686A includes a crystal driver with an external load capacitance. When enabled, the crystal driver starts in low power mode. The LowJitterMode bit controls the crystal driver, allowing it to switch between low power mode and low jitter mode (high power mode). Setting the LowJitterMode bit to 1 activates low jitter mode on three channels simultaneously. These three 32khz buffer outputs (32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C. The 32khz_ap output is typically routed to the AP Processor, while the 32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB, or peripheral chipsets. Signed-off-by: Anand Moon --- arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi index 65b000df176e..ca6ebd8a9d62 100644 --- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi @@ -298,6 +298,13 @@ max77686: pmic@9 { reg = <0x09>; #clock-cells = <1>; + max77686_osc: clocks { + compatible = "max77686-rtc"; + #clock-cells = <1>; + clock-output-names = "32khz_ap", + "32khz_cp", "32khz_pmic"; + }; + voltage-regulators { ldo1_reg: LDO1 { regulator-name = "P1.0V_LDO_OUT1";