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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a780a871f0esm363750466b.194.2024.07.12.10.09.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jul 2024 10:09:45 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 12 Jul 2024 18:09:44 +0100 Subject: [PATCH v4 2/2] clk: samsung: gs101: don't mark non-essential (UART) clocks critical Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240712-gs101-non-essential-clocks-2-v4-2-310aee0de46e@linaro.org> References: <20240712-gs101-non-essential-clocks-2-v4-0-310aee0de46e@linaro.org> In-Reply-To: <20240712-gs101-non-essential-clocks-2-v4-0-310aee0de46e@linaro.org> To: Peter Griffin , Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Tudor Ambarus , Sam Protsenko Cc: Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Draszik?= X-Mailer: b4 0.13.0 The peric0_top1_ipclk_0 and peric0_top1_pclk_0 are the clocks going to peric0/uart_usi, with pclk being the bus clock. Without pclk running, any bus access will hang. Unfortunately, in commit d97b6c902a40 ("arm64: dts: exynos: gs101: update USI UART to use peric0 clocks") the gs101 DT ended up specifying an incorrect pclk in the respective node and instead the two clocks here were marked as critical. Since then, the DT has been updated to use the correct clock in commit 21e4e8807bfc ("arm64: dts: exynos: gs101: use correct clocks for usi_uart") and the driver here should be corrected and the work-around removed. Link: https://lore.kernel.org/all/d45de3b2bb6b48653842cf1f74e58889ed6783ae.camel@linaro.org/ [1] Fixes: 893f133a040b ("clk: samsung: gs101: add support for cmu_peric0") Signed-off-by: André Draszik Reviewed-by: Tudor Ambarus Reviewed-by: Sam Protsenko --- v4: - the earlycon issue described in the commit message in previous versions of this patch is gone with "clk: samsung: gs101: allow earlycon to work unconditionally", so no need to mention anything v3: - add git commit SHA1s (Krzysztof) - add link to wordier description of earlycon issue v2: - commit message typo fixed - collect Reviewed-by: tags --- drivers/clk/samsung/clk-gs101.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c index 429690757923..a6fc4d7e47fd 100644 --- a/drivers/clk/samsung/clk-gs101.c +++ b/drivers/clk/samsung/clk-gs101.c @@ -3951,20 +3951,18 @@ static const struct samsung_gate_clock peric0_gate_clks[] __initconst = { "gout_peric0_peric0_top0_pclk_9", "mout_peric0_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_9, 21, 0, 0), - /* Disabling this clock makes the system hang. Mark the clock as critical. */ GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0, "gout_peric0_peric0_top1_ipclk_0", "dout_peric0_usi0_uart", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_0, - 21, CLK_IS_CRITICAL, 0), + 21, 0, 0), GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2, "gout_peric0_peric0_top1_ipclk_2", "dout_peric0_usi14_usi", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_2, 21, CLK_SET_RATE_PARENT, 0), - /* Disabling this clock makes the system hang. Mark the clock as critical. */ GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0, "gout_peric0_peric0_top1_pclk_0", "mout_peric0_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_0, - 21, CLK_IS_CRITICAL, 0), + 21, 0, 0), GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2, "gout_peric0_peric0_top1_pclk_2", "mout_peric0_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_2,