Message ID | 20240628223506.1237523-3-peter.griffin@linaro.org |
---|---|
State | New |
Headers | show |
Series | Add syscon-reboot and syscon-poweroff support for gs101/Pixel 6 | expand |
On Fri, 28 Jun 2024 23:35:04 +0100, Peter Griffin wrote: > Reboot of gs101 SoC can be handled by setting the > bit(SWRESET_SYSTEM[1]) of SYSTEM_CONFIGURATION register(PMU + 0x3a00). > > Poweroff of gs101 SoC can be handled by setting bit(DATA[8]) of > PAD_CTRL_PWR_HOLD register (PMU + 0x3e9c). > > Tested using "reboot" and "poweroff -p" commands. > > [...] Applied, thanks! [1/3] arm64: dts: exynos: gs101: add syscon-poweroff and syscon-reboot nodes https://git.kernel.org/krzk/linux/c/2d0c7ae784b487343b4813db9cb133ca51c674c3 Best regards,
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index eadb8822e6d4..302c5beb224a 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1394,6 +1394,21 @@ sysreg_apm: syscon@174204e0 { pmu_system_controller: system-controller@17460000 { compatible = "google,gs101-pmu", "syscon"; reg = <0x17460000 0x10000>; + + poweroff: syscon-poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmu_system_controller>; + offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */ + mask = <0x100>; /* reset value */ + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pmu_system_controller>; + offset = <0x3a00>; /* SYSTEM_CONFIGURATION */ + mask = <0x2>; /* SWRESET_SYSTEM */ + value = <0x2>; /* reset value */ + }; }; pinctrl_gpio_alive: pinctrl@174d0000 {