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([178.197.222.97]) by smtp.gmail.com with ESMTPSA id a2-20020a05600c348200b00413ee7993f3sm990512wmq.40.2024.03.13.12.11.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Mar 2024 12:11:56 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/2] ARM: dts: samsung: s5pv210: correct onenand size-cells Date: Wed, 13 Mar 2024 20:11:48 +0100 Message-Id: <20240313191148.21792-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240313191148.21792-1-krzysztof.kozlowski@linaro.org> References: <20240313191148.21792-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Children of NAND controllers have only chip select, so address without the size. Correct size-cells as reported by dtbs_check: s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi index 23459430410f..9720573d84dc 100644 --- a/arch/arm/boot/dts/samsung/s5pv210.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi @@ -82,7 +82,7 @@ onenand: nand-controller@b0600000 { clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; clock-names = "bus", "onenand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; };