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[34.78.140.88]) by smtp.gmail.com with ESMTPSA id j7-20020a05600c190700b0040e52cac976sm1625302wmq.29.2024.01.10.02.21.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 02:21:08 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, gregkh@linuxfoundation.org, jirislaby@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, Tudor Ambarus Subject: [PATCH 02/18] tty: serial: samsung: set UPIO_MEM32 iotype for gs101 Date: Wed, 10 Jan 2024 10:20:46 +0000 Message-ID: <20240110102102.61587-3-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240110102102.61587-1-tudor.ambarus@linaro.org> References: <20240110102102.61587-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 GS101's Connectivity Peripheral blocks (peric0/1 blocks) which include the I3C and USI (I2C, SPI, UART) only allow 32-bit register accesses. Instead of specifying the reg-io-width = 4 everywhere, for each node, the requirement should be deduced from the compatible. Infer UPIO_MEM32 iotype from the "google,gs101-uart" compatible. Update the uart info name to be GS101 specific in order to differentiate from the other exynos platforms. All the other settings are not changed. exynos_fifoszdt_serial_drv_data was replaced by gs101_serial_drv_data because the iotype restriction is gs101 specific and there was no other user of exynos_fifoszdt_serial_drv_data. Reviewed-by: Peter Griffin Reviewed-by: Krzysztof Kozlowski Signed-off-by: Tudor Ambarus Reviewed-by: Sam Protsenko --- drivers/tty/serial/samsung_tty.c | 38 +++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index b8fe9df20202..20ec6ef1a52f 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -2495,25 +2495,43 @@ static const struct s3c24xx_serial_drv_data exynos850_serial_drv_data = { .fifosize = { 256, 64, 64, 64 }, }; -/* - * Common drv_data struct for platforms that specify samsung,uart-fifosize in - * device tree. - */ -static const struct s3c24xx_serial_drv_data exynos_fifoszdt_serial_drv_data = { - EXYNOS_COMMON_SERIAL_DRV_DATA(), +static const struct s3c24xx_serial_drv_data gs101_serial_drv_data = { + .info = { + .name = "Google GS101 UART", + .type = TYPE_S3C6400, + .port_type = PORT_S3C6400, + .iotype = UPIO_MEM32, + .has_divslot = 1, + .rx_fifomask = S5PV210_UFSTAT_RXMASK, + .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, + .rx_fifofull = S5PV210_UFSTAT_RXFULL, + .tx_fifofull = S5PV210_UFSTAT_TXFULL, + .tx_fifomask = S5PV210_UFSTAT_TXMASK, + .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, + .def_clk_sel = S3C2410_UCON_CLKSEL0, + .num_clks = 1, + .clksel_mask = 0, + .clksel_shift = 0, + }, + .def_cfg = { + .ucon = S5PV210_UCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + .has_fracval = 1, + }, + /* samsung,uart-fifosize must be specified in the device tree. */ .fifosize = { 0 }, }; #define EXYNOS4210_SERIAL_DRV_DATA (&exynos4210_serial_drv_data) #define EXYNOS5433_SERIAL_DRV_DATA (&exynos5433_serial_drv_data) #define EXYNOS850_SERIAL_DRV_DATA (&exynos850_serial_drv_data) -#define EXYNOS_FIFOSZDT_DRV_DATA (&exynos_fifoszdt_serial_drv_data) +#define GS101_SERIAL_DRV_DATA (&gs101_serial_drv_data) #else #define EXYNOS4210_SERIAL_DRV_DATA NULL #define EXYNOS5433_SERIAL_DRV_DATA NULL #define EXYNOS850_SERIAL_DRV_DATA NULL -#define EXYNOS_FIFOSZDT_DRV_DATA NULL +#define GS101_SERIAL_DRV_DATA NULL #endif #ifdef CONFIG_ARCH_APPLE @@ -2601,7 +2619,7 @@ static const struct platform_device_id s3c24xx_serial_driver_ids[] = { .driver_data = (kernel_ulong_t)ARTPEC8_SERIAL_DRV_DATA, }, { .name = "gs101-uart", - .driver_data = (kernel_ulong_t)EXYNOS_FIFOSZDT_DRV_DATA, + .driver_data = (kernel_ulong_t)GS101_SERIAL_DRV_DATA, }, { }, }; @@ -2624,7 +2642,7 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = { { .compatible = "axis,artpec8-uart", .data = ARTPEC8_SERIAL_DRV_DATA }, { .compatible = "google,gs101-uart", - .data = EXYNOS_FIFOSZDT_DRV_DATA }, + .data = GS101_SERIAL_DRV_DATA }, {}, }; MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match);