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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id f27-20020a50a6db000000b0042be2dfa8bdsm267962edc.81.2022.05.26.07.37.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 07:37:27 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 6/7] arm64: dts: fsd: use local header for pinctrl register values Date: Thu, 26 May 2022 16:37:06 +0200 Message-Id: <20220526143707.767490-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220526143707.767490-1-krzysztof.kozlowski@linaro.org> References: <20220526143707.767490-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 92 +++++++++++----------- arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 33 ++++++++ 2 files changed, 79 insertions(+), 46 deletions(-) create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.h diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index d4d0cb005712..257e1d3efcb6 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -8,7 +8,7 @@ * https://www.tesla.com */ -#include +#include "fsd-pinctrl.h" &pinctrl_fsys0 { gpf0: gpf0-gpio-bank { @@ -223,107 +223,107 @@ gpg7: gpg7-gpio-bank { pwm0_out: pwm0-out-pins { samsung,pins = "gpb6-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpb6-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c0_bus: hs-i2c0-bus-pins { samsung,pins = "gpb0-0", "gpb0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c1_bus: hs-i2c1-bus-pins { samsung,pins = "gpb0-2", "gpb0-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c2_bus: hs-i2c2-bus-pins { samsung,pins = "gpb0-4", "gpb0-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c3_bus: hs-i2c3-bus-pins { samsung,pins = "gpb0-6", "gpb0-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c4_bus: hs-i2c4-bus-pins { samsung,pins = "gpb1-0", "gpb1-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c5_bus: hs-i2c5-bus-pins { samsung,pins = "gpb1-2", "gpb1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c6_bus: hs-i2c6-bus-pins { samsung,pins = "gpb1-4", "gpb1-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; hs_i2c7_bus: hs-i2c7-bus-pins { samsung,pins = "gpb1-6", "gpb1-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart0_data: uart0-data-pins { samsung,pins = "gpb7-0", "gpb7-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart1_data: uart1-data-pins { samsung,pins = "gpb7-4", "gpb7-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi2_bus: spi2-bus-pins { samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h new file mode 100644 index 000000000000..63703d2e9148 --- /dev/null +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung's Exynos pinctrl bindings + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM64_TESLA_FSD_PINCTRL_H__ +#define __DTS_ARM64_TESLA_FSD_PINCTRL_H__ + +#define FSD_PIN_PULL_NONE 0 +#define FSD_PIN_PULL_DOWN 1 +#define FSD_PIN_PULL_UP 3 + +#define FSD_PIN_DRV_LV1 0 +#define FSD_PIN_DRV_LV2 2 +#define FSD_PIN_DRV_LV3 1 +#define FSD_PIN_DRV_LV4 3 + +#define FSD_PIN_FUNC_INPUT 0 +#define FSD_PIN_FUNC_OUTPUT 1 +#define FSD_PIN_FUNC_2 2 +#define FSD_PIN_FUNC_3 3 +#define FSD_PIN_FUNC_4 4 +#define FSD_PIN_FUNC_5 5 +#define FSD_PIN_FUNC_6 6 +#define FSD_PIN_FUNC_EINT 0xf +#define FSD_PIN_FUNC_F FSD_PIN_FUNC_EINT + +#endif /* __DTS_ARM64_TESLA_FSD_PINCTRL_H__ */