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[91.184.167.102]) by smtp.gmail.com with ESMTPSA id p25-20020a17090664d900b006f3ef214e41sm92831ejn.167.2022.05.16.12.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 May 2022 12:38:54 -0700 (PDT) From: =?utf-8?q?Martin_J=C3=BCcker?= To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Alim Akhtar , Krzysztof Kozlowski , Rob Herring , Daniel Vetter , David Airlie , Sam Ravnborg , Thierry Reding , =?utf-8?q?Martin_J=C3=BCcker?= Subject: [PATCH 2/3] drm/panel: simple: add support for the Samsung LTL101AL01 panel Date: Mon, 16 May 2022 21:37:08 +0200 Message-Id: <20220516193709.10037-2-martin.juecker@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220516193709.10037-1-martin.juecker@gmail.com> References: <20220516193709.10037-1-martin.juecker@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add timings and panel description for the Samsung LTL101AL01 panel. Signed-off-by: Martin Jücker --- drivers/gpu/drm/panel/panel-simple.c | 34 ++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index a34f4198a534..e21f304315e4 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3073,6 +3073,37 @@ static const struct panel_desc rocktech_rk101ii01d_ct = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct display_timing samsung_ltl101al01_timing = { + .pixelclock = { 66663000, 66663000, 66663000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 18, 18, 18 }, + .hback_porch = { 36, 36, 36 }, + .hsync_len = { 16, 16, 16 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 4, 4, 4 }, + .vback_porch = { 16, 16, 16 }, + .vsync_len = { 3, 3, 3 }, + .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW, +}; + +static const struct panel_desc samsung_ltl101al01 = { + .timings = &samsung_ltl101al01_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 217, + .height = 135, + }, + .delay = { + .prepare = 40, + .enable = 300, + .disable = 200, + .unprepare = 600, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode samsung_ltn101nt05_mode = { .clock = 54030, .hdisplay = 1024, @@ -3966,6 +3997,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "rocktech,rk101ii01d-ct", .data = &rocktech_rk101ii01d_ct, + }, { + .compatible = "samsung,ltl101al01", + .data = &samsung_ltl101al01, }, { .compatible = "samsung,ltn101nt05", .data = &samsung_ltn101nt05,