| Message ID | 20220504114021.33265-12-jagan@amarulasolutions.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | drm: bridge: Add Samsung MIPI DSIM bridge | expand |
On Wed, 04 May 2022 17:10:20 +0530, Jagan Teki wrote: > Samsung MIPI DSIM bridge can also be found in i.MX8MM SoC. > > Add dt-bingings for it. > > v2: > * updated comments > > v1: > * new patch > > Cc: devicetree@vger.kernel.org, > Cc: Rob Herring <robh+dt@kernel.org> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Note: > I will send separate series for updating to yaml as the existing binding > is old that it has some properties need to fix. > > Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt index be377786e8cd..8efcf4728e0b 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt @@ -7,6 +7,7 @@ Required properties: "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ + "fsl,imx8mm-mipi-dsim" /* for i.MX8M Mini SoCs */ - reg: physical base address and length of the registers set for the device - interrupts: should contain DSI interrupt - clocks: list of clock specifiers, must contain an entry for each required
Samsung MIPI DSIM bridge can also be found in i.MX8MM SoC. Add dt-bingings for it. v2: * updated comments v1: * new patch Cc: devicetree@vger.kernel.org, Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Note: I will send separate series for updating to yaml as the existing binding is old that it has some properties need to fix. Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt | 1 + 1 file changed, 1 insertion(+)