From patchwork Tue Mar 29 15:29:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 555070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83BBAC4332F for ; Tue, 29 Mar 2022 15:29:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238753AbiC2Pbf (ORCPT ); Tue, 29 Mar 2022 11:31:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238624AbiC2PbN (ORCPT ); Tue, 29 Mar 2022 11:31:13 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C91E108182; Tue, 29 Mar 2022 08:29:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648567768; x=1680103768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D9rIVVydA1U6YDG/4d1Ed8j+r9S7iMMFVbYxLfWOamY=; b=FR3PtuFW12SSrP+kKAfDMM1OlKQ81/zRls0Np+HJ1D6LZb2lTcgfxTiz pRrFtBdfYaO+K0XTF7XvGJnDboddCpIQdUyfYur3COoh6Iee4Sre8KMuw KMWP+xt/6b4Q9aMcksCPEktUkV9nnygS6LthUE3pEQjFxp7HbJ/JkoAwu qjwgSgaUPq9V/ZnyJrTCAdYmD8e/692DULuxZd25y12OYNpdtNQXQm1Tl 9TSCutu0vG/9AiXh+9RgsbmfjwmKlKu7xLslfwxedIk9l1NaoR59skiud TjgvTG8dPoFybEB+gKSL4GZ5+mB/ufzKJRqJZ/joM6AVnkQE2Tsmx0N8Y g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="239207822" X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="239207822" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2022 08:29:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="604843273" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 29 Mar 2022 08:29:16 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6E4873C5; Tue, 29 Mar 2022 18:29:29 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Krzysztof Kozlowski , Fabien Dessenne , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Linus Walleij , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Geert Uytterhoeven , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v2 08/13] pinctrl: npcm7xx: Switch to use for_each_gpiochip_node() helper Date: Tue, 29 Mar 2022 18:29:21 +0300 Message-Id: <20220329152926.50958-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> References: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, do the following: - use a temporary variable for struct device pointer to shorten a few lines - get rid of a temporary variable for vIRQ number, assign it directly - switch to fwnode APIs where it makes sense Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 141 ++++++++++------------ 1 file changed, 61 insertions(+), 80 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 221c33300d60..e73732e79585 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -1862,88 +1862,69 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) { int ret = -ENXIO; struct resource res; - int id = 0, irq; - struct device_node *np; - struct of_phandle_args pinspec; - - for_each_available_child_of_node(pctrl->dev->of_node, np) - if (of_find_property(np, "gpio-controller", NULL)) { - ret = of_address_to_resource(np, 0, &res); - if (ret < 0) { - dev_err(pctrl->dev, - "Resource fail for GPIO bank %u\n", id); - return ret; - } - - pctrl->gpio_bank[id].base = - ioremap(res.start, resource_size(&res)); - - irq = irq_of_parse_and_map(np, 0); - if (irq < 0) { - dev_err(pctrl->dev, - "No IRQ for GPIO bank %u\n", id); - ret = irq; - return ret; - } - - ret = bgpio_init(&pctrl->gpio_bank[id].gc, - pctrl->dev, 4, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DIN, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DOUT, - NULL, - NULL, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_IEM, - BGPIOF_READ_OUTPUT_REG_SET); - if (ret) { - dev_err(pctrl->dev, "bgpio_init() failed\n"); - return ret; - } - - ret = of_parse_phandle_with_fixed_args(np, - "gpio-ranges", 3, - 0, &pinspec); - if (ret < 0) { - dev_err(pctrl->dev, - "gpio-ranges fail for GPIO bank %u\n", - id); - return ret; - } - - pctrl->gpio_bank[id].irq = irq; - pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; - pctrl->gpio_bank[id].gc.parent = pctrl->dev; - pctrl->gpio_bank[id].irqbase = - id * NPCM7XX_GPIO_PER_BANK; - pctrl->gpio_bank[id].pinctrl_id = pinspec.args[0]; - pctrl->gpio_bank[id].gc.base = pinspec.args[1]; - pctrl->gpio_bank[id].gc.ngpio = pinspec.args[2]; - pctrl->gpio_bank[id].gc.owner = THIS_MODULE; - pctrl->gpio_bank[id].gc.label = - devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOF", - np); - if (pctrl->gpio_bank[id].gc.label == NULL) - return -ENOMEM; - - pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; - pctrl->gpio_bank[id].direction_input = - pctrl->gpio_bank[id].gc.direction_input; - pctrl->gpio_bank[id].gc.direction_input = - npcmgpio_direction_input; - pctrl->gpio_bank[id].direction_output = - pctrl->gpio_bank[id].gc.direction_output; - pctrl->gpio_bank[id].gc.direction_output = - npcmgpio_direction_output; - pctrl->gpio_bank[id].request = - pctrl->gpio_bank[id].gc.request; - pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; - pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free; - pctrl->gpio_bank[id].gc.of_node = np; - id++; + struct device *dev = pctrl->dev; + struct fwnode_reference_args pinspec; + struct fwnode_handle *child; + int id = 0; + + for_each_gpiochip_node(dev, child) { + struct device_node *np = to_of_node(child); + + ret = of_address_to_resource(np, 0, &res); + if (ret < 0) { + dev_err(dev, "Resource fail for GPIO bank %u\n", id); + return ret; + } + + pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res)); + + ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT, + NULL, + NULL, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM, + BGPIOF_READ_OUTPUT_REG_SET); + if (ret) { + dev_err(dev, "bgpio_init() failed\n"); + return ret; } + ret = fwnode_property_get_reference_args(child, "gpio-ranges", NULL, 3, 0, &pinspec); + if (ret < 0) { + dev_err(dev, "gpio-ranges fail for GPIO bank %u\n", id); + return ret; + } + + ret = irq_of_parse_and_map(np, 0); + if (ret < 0) { + dev_err(dev, "No IRQ for GPIO bank %u\n", id); + return ret; + } + pctrl->gpio_bank[id].irq = ret; + pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; + pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK; + pctrl->gpio_bank[id].pinctrl_id = pinspec.args[0]; + pctrl->gpio_bank[id].gc.base = pinspec.args[1]; + pctrl->gpio_bank[id].gc.ngpio = pinspec.args[2]; + pctrl->gpio_bank[id].gc.owner = THIS_MODULE; + pctrl->gpio_bank[id].gc.parent = dev; + pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child); + if (pctrl->gpio_bank[id].gc.label == NULL) + return -ENOMEM; + + pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; + pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input; + pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input; + pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output; + pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output; + pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request; + pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; + pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free; + pctrl->gpio_bank[id].gc.fwnode = child; + id++; + } + pctrl->bank_num = id; return ret; }