From patchwork Tue Mar 29 15:29:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 555071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DA8FC4321E for ; Tue, 29 Mar 2022 15:29:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238665AbiC2Pbc (ORCPT ); Tue, 29 Mar 2022 11:31:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238642AbiC2PbN (ORCPT ); Tue, 29 Mar 2022 11:31:13 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47DFF10818D; Tue, 29 Mar 2022 08:29:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648567768; x=1680103768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zth2NPzVb/e4coajK8vBX+xb9WOqFJZLqpzxI+yuerA=; b=MQrr3m02V2alebT56UkSPEtLVVkrC1fsaYdiptTMT+zuTkUpIe6WS5J5 DX/gnIghD0D6vrWRm9job8wNxQuoLktyOxq7vroWdIO/+rIACOojk8y2t R5beNcMWolyrnwKJSPDFSoel0LFSfKqAwo847sgl19N1JIqrhBtdVB/KC cXtxX+2MJB7Nls8Jl/xyutuzS+pwhxKTQEaBuNKR57HN4DUmkbtlkd0Qv mk7VsuPfgIhv4Vu3QyIEk/67zj0+V8+we42pvXaHmkEP6n7holNGtFOTb 1Ey38DKz/ZV17ihh64wAYS8jdbBYLlFvx9o6tQwv+IButGxPnxzGC/Z54 w==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="322460285" X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="322460285" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2022 08:29:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="554297180" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 29 Mar 2022 08:29:16 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 512A72FB; Tue, 29 Mar 2022 18:29:29 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Krzysztof Kozlowski , Fabien Dessenne , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Linus Walleij , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Geert Uytterhoeven , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v2 06/13] pinctrl: renesas: rza1: Replace custom code by gpiochip_node_count() call Date: Tue, 29 Mar 2022 18:29:19 +0300 Message-Id: <20220329152926.50958-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> References: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rza1.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c index 8bad121d2a4e..5075d5cebe8c 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -1154,21 +1154,6 @@ static const struct pinmux_ops rza1_pinmux_ops = { * RZ/A1 pin controller driver operations */ -static unsigned int rza1_count_gpio_chips(struct device_node *np) -{ - struct device_node *child; - unsigned int count = 0; - - for_each_child_of_node(np, child) { - if (!of_property_read_bool(child, "gpio-controller")) - continue; - - count++; - } - - return count; -} - /** * rza1_parse_gpiochip() - parse and register a gpio chip and pin range * @@ -1255,7 +1240,7 @@ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl) unsigned int i; int ret; - ngpiochips = rza1_count_gpio_chips(np); + ngpiochips = gpiochip_node_count(rza1_pctl->dev); if (ngpiochips == 0) { dev_dbg(rza1_pctl->dev, "No gpiochip registered\n"); return 0;