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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id v24sm3417780ejf.7.2022.02.19.10.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:44:56 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 7/8] arm64: dts: qcom: use 'freq-table' in UFS node Date: Sat, 19 Feb 2022 19:44:52 +0100 Message-Id: <20220219184453.44689-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +++++++++++------------ arch/arm64/boot/dts/qcom/msm8998.dtsi | 17 ++++++++--------- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8250.dtsi | 17 ++++++++--------- arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 17 ++++++++--------- 7 files changed, 62 insertions(+), 69 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c85825ea1623..2d6ad6dfa0dd 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1761,18 +1761,17 @@ ufshc: ufshc@624000 { <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; - freq-table-hz = - <100000000 200000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <150000000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <100000000 200000000 + 0 0 + 0 0 + 0 0 + 0 0 + 150000000 300000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 0>; lanes-per-direction = <1>; #reset-cells = <1>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 2fda21e810c9..eee7bc35e468 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -990,15 +990,14 @@ ufshc: ufshc@1da4000 { <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; - freq-table-hz = - <50000000 200000000>, - <0 0>, - <0 0>, - <37500000 150000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <50000000 200000000 + 0 0 + 0 0 + 37500000 150000000 + 0 0 + 0 0 + 0 0 + 0 0>; resets = <&gcc GCC_UFS_BCR>; reset-names = "rst"; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0d6286d27dd4..987730032c0b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2274,16 +2274,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = - <50000000 200000000>, - <0 0>, - <0 0>, - <37500000 150000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 300000000>; + freq-table = <50000000 200000000 + 0 0 + 0 0 + 37500000 150000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 300000000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index d15fee495238..3c5acf07337d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1782,16 +1782,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 300000000>; + freq-table = <37500000 300000000 + 0 0 + 0 0 + 37500000 300000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 300000000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303ba047..308585cde3b0 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2133,15 +2133,14 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <37500000 300000000 + 0 0 + 0 0 + 37500000 300000000 + 0 0 + 0 0 + 0 0 + 0 0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index d242bab69c2e..526a328a9b7e 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1935,16 +1935,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <75000000 300000000>, - <75000000 300000000>, - <0 0>, - <0 0>, - <75000000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <75000000 300000000 + 75000000 300000000 + 0 0 + 0 0 + 75000000 300000000 + 0 0 + 0 0 + 0 0 + 0 0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 934e29b9e153..ed72dbdf3435 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1398,15 +1398,14 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <75000000 300000000>, - <0 0>, - <0 0>, - <75000000 300000000>, - <75000000 300000000>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <75000000 300000000 + 0 0 + 0 0 + 75000000 300000000 + 75000000 300000000 + 0 0 + 0 0 + 0 0>; status = "disabled"; };