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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id e4sm4030881ejs.13.2022.01.11.12.18.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jan 2022 12:18:17 -0800 (PST) From: Krzysztof Kozlowski To: Tomasz Figa , Krzysztof Kozlowski , Sylwester Nawrocki , Linus Walleij , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Sam Protsenko , Chanho Park , Alim Akhtar Subject: [PATCH v2 19/28] arm64: dts: exynos: align pinctrl with dtschema in Exynos850 Date: Tue, 11 Jan 2022 21:17:13 +0100 Message-Id: <20220111201722.327219-13-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220111201426.326777-1-krzysztof.kozlowski@canonical.com> References: <20220111201426.326777-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Align the pin controller related nodes with dtschema. No functional change expected. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko --- .../boot/dts/exynos/exynos850-pinctrl.dtsi | 52 +++++++++---------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi index f576b29c9b16..a71acf358d2d 100644 --- a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi @@ -13,7 +13,7 @@ #include &pinctrl_alive { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -30,7 +30,7 @@ gpa0: gpa0 { ; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -47,7 +47,7 @@ gpa1: gpa1 { ; }; - gpa2: gpa2 { + gpa2: gpa2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -64,7 +64,7 @@ gpa2: gpa2 { ; }; - gpa3: gpa3 { + gpa3: gpa3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -81,7 +81,7 @@ gpa3: gpa3 { ; }; - gpa4: gpa4 { + gpa4: gpa4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -94,7 +94,7 @@ gpa4: gpa4 { ; }; - gpq0: gpq0 { + gpq0: gpq0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -134,7 +134,7 @@ uart1_pins: uart1-pins { }; &pinctrl_cmgp { - gpm0: gpm0 { + gpm0: gpm0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -144,7 +144,7 @@ gpm0: gpm0 { interrupts = ; }; - gpm1: gpm1 { + gpm1: gpm1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -154,7 +154,7 @@ gpm1: gpm1 { interrupts = ; }; - gpm2: gpm2 { + gpm2: gpm2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -164,7 +164,7 @@ gpm2: gpm2 { interrupts = ; }; - gpm3: gpm3 { + gpm3: gpm3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -174,7 +174,7 @@ gpm3: gpm3 { interrupts = ; }; - gpm4: gpm4 { + gpm4: gpm4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -184,7 +184,7 @@ gpm4: gpm4 { interrupts = ; }; - gpm5: gpm5 { + gpm5: gpm5-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -256,7 +256,7 @@ spi2_pins: spi2-pins { }; &pinctrl_aud { - gpb0: gpb0 { + gpb0: gpb0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -264,7 +264,7 @@ gpb0: gpb0 { #interrupt-cells = <2>; }; - gpb1: gpb1 { + gpb1: gpb1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -322,7 +322,7 @@ aud_fm_idle_pins: aud-fm-idle-pins { }; &pinctrl_hsi { - gpf2: gpf2 { + gpf2: gpf2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -367,7 +367,7 @@ sd2_pdn_pins: sd2-pdn-pins { }; &pinctrl_core { - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -375,7 +375,7 @@ gpf0: gpf0 { #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -434,7 +434,7 @@ sd0_bus8_pins: sd0-bus8-pins { }; &pinctrl_peri { - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -442,7 +442,7 @@ gpc0: gpc0 { #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -450,7 +450,7 @@ gpc1: gpc1 { #interrupt-cells = <2>; }; - gpg0: gpg0 { + gpg0: gpg0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -458,7 +458,7 @@ gpg0: gpg0 { #interrupt-cells = <2>; }; - gpg1: gpg1 { + gpg1: gpg1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -466,7 +466,7 @@ gpg1: gpg1 { #interrupt-cells = <2>; }; - gpg2: gpg2 { + gpg2: gpg2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -474,7 +474,7 @@ gpg2: gpg2 { #interrupt-cells = <2>; }; - gpg3: gpg3 { + gpg3: gpg3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -482,14 +482,14 @@ gpg3: gpg3 { #interrupt-cells = <2>; }; - gpp0: gpp0 { + gpp0: gpp0-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpp1: gpp1 { + gpp1: gpp1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -497,7 +497,7 @@ gpp1: gpp1 { #interrupt-cells = <2>; }; - gpp2: gpp2 { + gpp2: gpp2-gpio-bank { gpio-controller; #gpio-cells = <2>;