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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id y36sm2796514lfa.75.2021.12.31.08.22.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Dec 2021 08:22:11 -0800 (PST) From: Krzysztof Kozlowski To: Tomasz Figa , Krzysztof Kozlowski , Sylwester Nawrocki , Linus Walleij , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Sam Protsenko , Chanho Park Subject: [PATCH 08/24] ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi Date: Fri, 31 Dec 2021 17:21:51 +0100 Message-Id: <20211231162207.257478-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211231161930.256733-1-krzysztof.kozlowski@canonical.com> References: <20211231161930.256733-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The pin configuration for PMIC DVS (pmic-dvs-2 and pmic-dvs-3) are exactly the same, so merge them. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5800-peach-pi.dts | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 6bf3fd37fb2b..eca805b83816 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -221,7 +221,7 @@ max77802: pmic@9 { interrupts = <1 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&max77802_irq>, <&pmic_selb>, - <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>; + <&pmic_dvs_1>, <&pmic_dvs_2>; wakeup-source; reg = <0x9>; #clock-cells = <1>; @@ -874,26 +874,20 @@ &sd1_cmd { &pinctrl_2 { pmic_dvs_2: pmic-dvs-2 { - samsung,pins = "gpj4-2"; + samsung,pins = "gpj4-2", "gpj4-3"; samsung,pin-function = ; samsung,pin-pud = ; samsung,pin-drv = ; }; +}; - pmic_dvs_3: pmic-dvs-3 { - samsung,pins = "gpj4-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; - }; +/* pinctrl_3*/ +/* Drive SPI lines at x2 for better integrity */ +&spi2_bus { + samsung,pin-drv = ; }; &pinctrl_3 { - /* Drive SPI lines at x2 for better integrity */ - spi2-bus { - samsung,pin-drv = ; - }; - /* Drive SPI chip select at x2 for better integrity */ ec_spi_cs: ec-spi-cs { samsung,pins = "gpb1-2";