From patchwork Mon Aug 3 21:01:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring \(Arm\)" X-Patchwork-Id: 247415 Delivered-To: patch@linaro.org Received: by 2002:a92:cc90:0:0:0:0:0 with SMTP id x16csp1540045ilo; Mon, 3 Aug 2020 14:02:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxR7ObSiiqRqV/GrjJtK/zxZP/9bS9zrYxbi+ZCfiVuHTGymrYgXPR9H3UFnWYTTKJGFzMr X-Received: by 2002:a17:906:1455:: with SMTP id q21mr18167694ejc.139.1596488540520; Mon, 03 Aug 2020 14:02:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596488540; cv=none; d=google.com; s=arc-20160816; b=kY1O9sPMUalN7Js04CO23ttlbTkQvt7wxQeY+Bnv4dKYLZE3UbQqBk0tLWhlzVjgCu qPvS5BR5UGFP229k+QYVDA9EJR+JCyxqv3s1GQhzDkGdUopFBCadrInuPoId7NJE7ZH2 dTxsKsKEZYP5QXdzWNCgGgM0eDWbxZA6w808HvnwXJYbtcx9TyHisRDh8/g/vvPhkgIk zQZ4bWSw96v1AAkGbMwWKsf3BuYe0aNCjTX6lKRNumUAz1i9mu3JQjhZuccsZQN/G1Ob blQtB6ikMMcnKCwi7b5Wv8jYtRDwuNe1wHPzuEZZtDp+opVZvfTuwAwtlJQXs59HhxOk zGrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=yeVh4LY4Ol0sFEbqSsJcffa7f//z27paKHgfSp0xtxI=; b=DwsJCsfd+8Hl8Kp1hRRwTF7qKyBGf9Zyk76RDigE48vQJVglgO3BtdrUC11wMEDHYI AUohdvZObqLBZXTLQ9C8uCgQKA2Xq5J+0nO1RoS8+eKoPN8uZwJTxgsT6+UFgEPEILXI F8csvf95tX0T552YOfkio/wcAFaSumdCFWzCs2695xcEfRYl4L5DZKToLAQGSJOK6IUh bnUd1/6LHrPlY8vGgYY6pDSSyinZd7WWpXFQp4HB4oBiom/kTQreQIC9DS/Se/XKoYTJ usHBpmYON6QSSf+PhiGjXklsOEW/tGDtsO3RDm4rj37GF/qIoCh1muHnU2IOza+K/HTJ 9JGw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a16si11728729ejk.194.2020.08.03.14.02.20; Mon, 03 Aug 2020 14:02:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-samsung-soc-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729460AbgHCVCT (ORCPT + 4 others); Mon, 3 Aug 2020 17:02:19 -0400 Received: from mail-io1-f65.google.com ([209.85.166.65]:45789 "EHLO mail-io1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728570AbgHCVCS (ORCPT ); Mon, 3 Aug 2020 17:02:18 -0400 Received: by mail-io1-f65.google.com with SMTP id u126so2719389iod.12; Mon, 03 Aug 2020 14:02:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yeVh4LY4Ol0sFEbqSsJcffa7f//z27paKHgfSp0xtxI=; b=PRxnPLGjDqHtLZhyyfH0d3hVBWgx6ENJDH2v8rbBdzDz8WvI2bv3DxRsayKghBvaLr et58lDEMVgpvs9peb7FXlDYGNJpHfz6VTdjV5cf3Ktqy5XhITlEQ15Cdwg/vfhg6bBWC KKN/aeiPF54OSzB9/qiQLjGrONIKjt5BupoGzFkujXOo7y4Q318vSuxKWVVaFyeRP8Ce c3rnc6e2fYknq2FcW75uu9Txm8LZ8fslt2H4nAJhP30/gVRjrAelNGdRCfJ7+AUq7vOK 3Mx5px8snzwGRqyw6/PRk+hDSC9kZ6K4N+Dj/EerPkIm5RJTx18LN40CMy+VVlIjZzLm 0SkA== X-Gm-Message-State: AOAM532dXE+PdD82jUDZ0HDBO2ET4azXc2YfWsOQAEHh8lgklpbDm26H ptF4uHxeQEbkNywjVr7ybA== X-Received: by 2002:a5e:c30f:: with SMTP id a15mr1845040iok.184.1596488537676; Mon, 03 Aug 2020 14:02:17 -0700 (PDT) Received: from xps15.herring.priv ([64.188.179.252]) by smtp.googlemail.com with ESMTPSA id r6sm9292280iod.7.2020.08.03.14.02.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 14:02:17 -0700 (PDT) From: Rob Herring To: Bjorn Helgaas , Gustavo Pimentel , Jingoo Han , Lorenzo Pieralisi Cc: Binghui Wang , Bjorn Andersson , Fabio Estevam , Jesper Nilsson , Jonathan Chocron , Jonathan Hunter , Kevin Hilman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Kukjin Kim , Kunihiko Hayashi , linux-amlogic@lists.infradead.org, linux-arm-kernel@axis.com, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org, Lucas Stach , Masahiro Yamada , Murali Karicheri , NXP Linux Team , Pengutronix Kernel Team , Pratyush Anand , Richard Zhu , Sascha Hauer , Shawn Guo , Stanimir Varbanov , Thierry Reding , Xiaowei Song , Yue Wang Subject: [RFC 22/27] PCI: dwc/imx6: Remove duplicate define PCIE_LINK_WIDTH_SPEED_CONTROL Date: Mon, 3 Aug 2020 15:01:11 -0600 Message-Id: <20200803210116.3132633-23-robh@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200803210116.3132633-1-robh@kernel.org> References: <20200803210116.3132633-1-robh@kernel.org> MIME-Version: 1.0 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org PCIE_LINK_WIDTH_SPEED_CONTROL is already defined in pcie-designware.h, so remove it from the i.MX6 driver. Cc: Richard Zhu Cc: Lucas Stach Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring --- drivers/pci/controller/dwc/pci-imx6.c | 2 -- 1 file changed, 2 deletions(-) -- 2.25.1 diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 7b526f4f85ce..64e694f04dce 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -116,8 +116,6 @@ struct imx6_pcie { #define PCIE_PHY_STAT (PL_OFFSET + 0x110) #define PCIE_PHY_STAT_ACK BIT(16) -#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C - /* PHY registers (not memory-mapped) */ #define PCIE_PHY_ATEOVRD 0x10 #define PCIE_PHY_ATEOVRD_EN BIT(2)