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Wed, 21 Feb 2018 10:15:36 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges1new.samsung.com (EUCPMTA) with SMTP id 32.BA.05700.7C64D8A5; Wed, 21 Feb 2018 10:15:35 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20180221101534eucas1p29d832ffe11055241a39d79a8863845ad~VT7-bCWBQ1444614446eucas1p2q; Wed, 21 Feb 2018 10:15:34 +0000 (GMT) X-AuditID: cbfec7f2-1c1ff70000011644-32-5a8d46c7c391 Received: from eusync3.samsung.com ( [203.254.199.213]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id F1.04.04183.6C64D8A5; Wed, 21 Feb 2018 10:15:34 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P4H005K9WHT4SB0@eusync3.samsung.com>; Wed, 21 Feb 2018 10:15:34 +0000 (GMT) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Inki Dae , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 5/6] soc: samsung: pm_domains: Deprecate support for clocks Date: Wed, 21 Feb 2018 11:15:26 +0100 Message-id: <20180221101527.25554-6-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 In-reply-to: <20180221101527.25554-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrAIsWRmVeSWpSXmKPExsWy7djPc7rH3XqjDJpvKFhsnLGe1eL6l+es FpPuT2CxOH9+A7vFx557rBYzzu9jslh75C67xeE37awOHB6bVnWyefRtWcXo8XmTXABzFJdN SmpOZllqkb5dAlfGn6M+BVfMKiau3sHWwNim08XIwSEhYCKxe6d5FyMXh5DACkaJhddeMUI4 nxklLr99xdbFyAlW9OBgJ1RiGaPEpRdvoZwGJol5k1tYQarYBAwlut52gXWICDhIfP70GqyI WaCNSeLsgf1MIAlhAW+J5csmgBWxCKhKTN2yHSzOK2Ar0bp6BzPEOnmJxd93soHcxylgJ7Hz JQfIHAmBn6wST6ZvZoWocZH41n8D6jxhiVfHt7BD2DISlyd3s0A09DNK/Pv/kgnCmcEosf5j K1SVtcTh4xfBJjEL8ElM2jadGRIavBIdbUIQJR4Sn149h1rgKHF0x0U2iJcnMkp83jWPfQKj 1AJGhlWM4qmlxbnpqcWGeanlesWJucWleel6yfm5mxiB8Xj63/FPOxi/Xko6xCjAwajEw2uh 0xMlxJpYVlyZe4hRgoNZSYS3Uqg3Sog3JbGyKrUoP76oNCe1+BCjNAeLkjhvnEZdlJBAemJJ anZqakFqEUyWiYNTqoExymhCmHGn5W5Ztz/KN7ozckq0pxxSeDufe803kWy9hhn3Ds8/mlhd 9fPeHi2HZKfFxQluRa8el8nI/juZzGrXtST3gYDyjslqE2XFzya+k8mvT2BJeBrVY3d11V8v htjAFwtjd1yN/Tmht37puoOZSRNO5sX4J69osGhhPMJy5dTqCzIG/EeVWIozEg21mIuKEwHH 7km7wwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkluLIzCtJLcpLzFFi42I5/e/4Vd1jbr1RBn/+aVtsnLGe1eL6l+es FpPuT2CxOH9+A7vFx557rBYzzu9jslh75C67xeE37awOHB6bVnWyefRtWcXo8XmTXABzFJdN SmpOZllqkb5dAlfGn6M+BVfMKiau3sHWwNim08XIySEhYCLx4GAnYxcjF4eQwBJGiQePpkA5 TUwSO6euYAKpYhMwlOh628UGYosIOEh8/vQarIhZoINJYs/eh2AJYQFvieXLJoDZLAKqElO3 bAdr5hWwlWhdvYMZYp28xOLvO4FqODg4Bewkdr7kAAkLAZVMW/uWfQIjzwJGhlWMIqmlxbnp ucVGesWJucWleel6yfm5mxiBAbPt2M8tOxi73gUfYhTgYFTi4bXQ6YkSYk0sK67MPcQowcGs JMJbKdQbJcSbklhZlVqUH19UmpNafIhRmoNFSZz3vEFllJBAemJJanZqakFqEUyWiYNTqoFx j8kFzz3Pite4MrBd6791a6NAxt1HD2Ye7Qx1mGYrnq1+qHDdlp2rmJbGKuozfE0pZPRI9dOw W5ZTvPcMZ5627f7JSR+2Tf6wbnufxoYz3cvvzfILqI+cyFqevZ475VJJvm/zWfM9acf+71Vf XHHo+76vXyxWHlp4IYhnUpvc/qaVPy9quK3YqsRSnJFoqMVcVJwIAKJS0REUAgAA X-CMS-MailID: 20180221101534eucas1p29d832ffe11055241a39d79a8863845ad X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20180221101534eucas1p29d832ffe11055241a39d79a8863845ad X-RootMTR: 20180221101534eucas1p29d832ffe11055241a39d79a8863845ad References: <20180221101527.25554-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Handling of special clock operations on power domain on/off sequences has been moved to respective Exynos clock controller drivers, so there is no need to keep the duplicated (and conflicting) code in Exynos power domain driver. Mark clock related properties in Exynos power domain bindings as deprecated. This change has no inpact on backwards-compatibility, as the new drivers properly work with old DTBs (deprecated properties are ignored). Signed-off-by: Marek Szyprowski --- .../devicetree/bindings/power/pd-samsung.txt | 20 +---- drivers/soc/samsung/pm_domains.c | 90 +--------------------- 2 files changed, 5 insertions(+), 105 deletions(-) -- 2.15.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/power/pd-samsung.txt b/Documentation/devicetree/bindings/power/pd-samsung.txt index 549f7dee9b9d..92ef355e8f64 100644 --- a/Documentation/devicetree/bindings/power/pd-samsung.txt +++ b/Documentation/devicetree/bindings/power/pd-samsung.txt @@ -15,23 +15,13 @@ Required Properties: Optional Properties: - label: Human readable string with domain name. Will be visible in userspace to let user to distinguish between multiple domains in SoC. -- clocks: List of clock handles. The parent clocks of the input clocks to the - devices in this power domain are set to oscclk before power gating - and restored back after powering on a domain. This is required for - all domains which are powered on and off and not required for unused - domains. -- clock-names: The following clocks can be specified: - - oscclk: Oscillator clock. - - clkN: Input clocks to the devices in this power domain. These clocks - will be reparented to oscclk before switching power domain off. - Their original parent will be brought back after turning on - the domain. Maximum of 4 clocks (N = 0 to 3) are supported. - - asbN: Clocks required by asynchronous bridges (ASB) present in - the power domain. These clock should be enabled during power - domain on/off operations. - power-domains: phandle pointing to the parent power domain, for more details see Documentation/devicetree/bindings/power/power_domain.txt +Deprecated Properties: +- clocks +- clock-names + Node of a device using power domains must have a power-domains property defined with a phandle to respective power domain. @@ -47,8 +37,6 @@ Example: mfc_pd: power-domain@10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>; - clock-names = "oscclk", "clk0"; #power-domain-cells = <0>; label = "MFC"; }; diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index caf45cf7aa8e..ab8582971bfc 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -13,14 +13,11 @@ #include #include #include -#include #include #include #include #include -#define MAX_CLK_PER_DOMAIN 4 - struct exynos_pm_domain_config { /* Value for LOCAL_PWR_CFG and STATUS fields for each domain */ u32 local_pwr_cfg; @@ -33,10 +30,6 @@ struct exynos_pm_domain { void __iomem *base; bool is_off; struct generic_pm_domain pd; - struct clk *oscclk; - struct clk *clk[MAX_CLK_PER_DOMAIN]; - struct clk *pclk[MAX_CLK_PER_DOMAIN]; - struct clk *asb_clk[MAX_CLK_PER_DOMAIN]; u32 local_pwr_cfg; }; @@ -46,29 +39,10 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) void __iomem *base; u32 timeout, pwr; char *op; - int i; pd = container_of(domain, struct exynos_pm_domain, pd); base = pd->base; - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_prepare_enable(pd->asb_clk[i]); - } - - /* Set oscclk before powering off a domain*/ - if (!power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - pd->pclk[i] = clk_get_parent(pd->clk[i]); - if (clk_set_parent(pd->clk[i], pd->oscclk)) - pr_err("%s: error setting oscclk as parent to clock %d\n", - domain->name, i); - } - } - pwr = power_on ? pd->local_pwr_cfg : 0; writel_relaxed(pwr, base); @@ -86,26 +60,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) usleep_range(80, 100); } - /* Restore clocks after powering on a domain*/ - if (power_on) { - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->clk[i])) - break; - - if (IS_ERR(pd->pclk[i])) - continue; /* Skip on first power up */ - if (clk_set_parent(pd->clk[i], pd->pclk[i])) - pr_err("%s: error setting parent to clock%d\n", - domain->name, i); - } - } - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - if (IS_ERR(pd->asb_clk[i])) - break; - clk_disable_unprepare(pd->asb_clk[i]); - } - return 0; } @@ -147,12 +101,6 @@ static __init const char *exynos_get_domain_name(struct device_node *node) return kstrdup_const(name, GFP_KERNEL); } -static const char *soc_force_no_clk[] = { - "samsung,exynos5250-clock", - "samsung,exynos5420-clock", - "samsung,exynos5800-clock", -}; - static __init int exynos4_pm_init_power_domain(void) { struct device_node *np; @@ -161,7 +109,7 @@ static __init int exynos4_pm_init_power_domain(void) for_each_matching_node_and_match(np, exynos_pm_domain_of_match, &match) { const struct exynos_pm_domain_config *pm_domain_cfg; struct exynos_pm_domain *pd; - int on, i; + int on; pm_domain_cfg = match->data; @@ -189,42 +137,6 @@ static __init int exynos4_pm_init_power_domain(void) pd->pd.power_on = exynos_pd_power_on; pd->local_pwr_cfg = pm_domain_cfg->local_pwr_cfg; - for (i = 0; i < ARRAY_SIZE(soc_force_no_clk); i++) - if (of_find_compatible_node(NULL, NULL, - soc_force_no_clk[i])) - goto no_clk; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "asb%d", i); - pd->asb_clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->asb_clk[i])) - break; - } - - pd->oscclk = of_clk_get_by_name(np, "oscclk"); - if (IS_ERR(pd->oscclk)) - goto no_clk; - - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { - char clk_name[8]; - - snprintf(clk_name, sizeof(clk_name), "clk%d", i); - pd->clk[i] = of_clk_get_by_name(np, clk_name); - if (IS_ERR(pd->clk[i])) - break; - /* - * Skip setting parent on first power up. - * The parent at this time may not be useful at all. - */ - pd->pclk[i] = ERR_PTR(-EINVAL); - } - - if (IS_ERR(pd->clk[0])) - clk_put(pd->oscclk); - -no_clk: on = readl_relaxed(pd->base + 0x4) & pd->local_pwr_cfg; pm_genpd_init(&pd->pd, NULL, !on);