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Mon, 23 Oct 2017 08:54:53 +0100 (BST) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20171023075452eucas1p2881393094c507e4409005a498658f28d~wI9mZKgXj0129001290eucas1p2v; Mon, 23 Oct 2017 07:54:52 +0000 (GMT) X-AuditID: cbfec7ef-f79ee6d000003120-31-59eda04d35a8 Received: from eusync3.samsung.com ( [203.254.199.213]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 78.D3.18832.C40ADE95; Mon, 23 Oct 2017 08:54:52 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OY900M2KNB49IB0@eusync3.samsung.com>; Mon, 23 Oct 2017 08:54:52 +0100 (BST) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Seung-Woo Kim , Andrzej Hajda , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Krzysztof Kozlowski , Sylwester Nawrocki , Andrzej Pietrasiewicz , Hoegeun Kwon Subject: [PATCH v4 8/9] ARM: dts: exynos: Add mem-2-mem Scaler devices Date: Mon, 23 Oct 2017 09:54:27 +0200 Message-id: <20171023075428.7003-9-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171023075428.7003-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsWy7djP87q+C95GGjxcz2Jxa905VotZL9tZ LDbOWM9qceXrezaL98u72Cwm3Z/AYnH+/AZ2ixnn9zFZrD1yl93i8Jt2VosZk1+yWbSt/sDq wOOxaVUnm8f97uNMHv+OsXv0bVnF6PF5k1wAaxSXTUpqTmZZapG+XQJXxq0Ns1gLmiUrpi66 ztTAeFm4i5GTQ0LAROLNlcmMELaYxIV769lAbCGBZYwSZ18ydTFyAdmfGSUmbzrJDNPw79ka ZogEUNGUXYfZIJwGJonpx56DVbEJGEp0ve0CGyUi4CbRdHgmK0gRs8AuZokXk1+zgySEgRLv dp0A280ioCrRc28zC4jNK2AjcfHyKRaIdfIS7xfcB6vhFLCVuHR/J9ggCYENbBLnL29ggihy kZg56TlUg7DEq+Nb2CFsGYnOjoNQNf2MEk2t2hD2DEaJc295IWxricPHL7KC2MwCfBKTtk0H +oADKM4r0dEmBFHiIfHnxXaokY4Su7dOYoH4eAKjxNNdp9gmMEovYGRYxSiSWlqcm55abKhX nJhbXJqXrpecn7uJERjbp/8df7+D8WlzyCFGAQ5GJR7eCOO3kUKsiWXFlbmHGCU4mJVEeOdY AIV4UxIrq1KL8uOLSnNSiw8xSnOwKInz2ka1RQoJpCeWpGanphakFsFkmTg4pRoYy81Ybxmo m6g+UFvdszlgR8PPDwfZHgQZ3P+SFqmwVSXo+FS/JWK3Are+2dmTdkbeSsvq+CbXk1MYzysr TFN061aPv9RkMjNE9pn4Jc7FuZE85vz+jmt3ZKZnrtI6+6D0Ypi86IxWPlb+pXGG1+OF5n+r WxoSr9W4WKCy2uvERsGa+2veHGNTYinOSDTUYi4qTgQAlpDmEekCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrFLMWRmVeSWpSXmKPExsVy+t/xq7o+C95GGnSvV7O4te4cq8Wsl+0s FhtnrGe1uPL1PZvF++VdbBaT7k9gsTh/fgO7xYzz+5gs1h65y25x+E07q8WMyS/ZLNpWf2B1 4PHYtKqTzeN+93Emj3/H2D36tqxi9Pi8SS6ANYrLJiU1J7MstUjfLoEr49aGWawFzZIVUxdd Z2pgvCzcxcjJISFgIvHv2RpmCFtM4sK99WxdjFwcQgJLGCUurj7DCOE0MUls/PwerIpNwFCi 620XG4gtIuAm0XR4JiuIzSywj1liY5s3iC0MFH+36wQjiM0ioCrRc28zC4jNK2AjcfHyKRaI bfIS7xfcB6vhFLCVuHR/J9AcDqBlNhK7Wn0mMPIuYGRYxSiSWlqcm55bbKhXnJhbXJqXrpec n7uJERiC24793LyD8dLG4EOMAhyMSjy8EcZvI4VYE8uKK3MPMUpwMCuJ8M6xAArxpiRWVqUW 5ccXleakFh9ilOZgURLn7d2zOlJIID2xJDU7NbUgtQgmy8TBKdXAaFbk+Wvdrw86NyLdXzj8 cpb/+8ly3dxTs4VLOO1F9v9c4Lt4reb1O+e2P67jNot0ZO+7d3RuhOiqLQEzdza1yWecfCZ+ q2ijLO+vkMYwTob53FO6jz3uyGuS3dG6RUlzivFVza+bX856m+WwRfbUgdndK5kyYm8WbDsr lqC1q/FZ9d8/5mY+cUosxRmJhlrMRcWJAL7orTE9AgAA X-CMS-MailID: 20171023075452eucas1p2881393094c507e4409005a498658f28d X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20171023075452eucas1p2881393094c507e4409005a498658f28d X-RootMTR: 20171023075452eucas1p2881393094c507e4409005a498658f28d References: <20171023075428.7003-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Andrzej Pietrasiewicz There are 3 scaler devices in Exynos5420 SoCs, all are a part of MSCL power domain. MSCL power domain and SYSMMU controllers (two per each scaler device) have been already added to exynos5420.dtsi earlier, so bind them to newly added devices. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos5420.dtsi | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 88e5d6d3f901..7894045bd91b 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -678,6 +678,35 @@ iommus = <&sysmmu_gscl1>; }; + scaler_0: scaler@12800000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12800000 0x1294>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL0>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler0r>, <&sysmmu_scaler0w>; + }; + + scaler_1: scaler@12810000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12810000 0x1294>; + interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL1>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler1r>, <&sysmmu_scaler1w>; + }; + scaler_2: scaler@12820000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12820000 0x1294>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL2>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler2r>, <&sysmmu_scaler2w>; + }; + jpeg_0: jpeg@11F50000 { compatible = "samsung,exynos5420-jpeg"; reg = <0x11F50000 0x1000>; @@ -812,6 +841,7 @@ interrupts = <22 4>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; + power-domains = <&msc_pd>; #iommu-cells = <0>; }; @@ -821,6 +851,7 @@ interrupts = ; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; + power-domains = <&msc_pd>; #iommu-cells = <0>; }; @@ -830,6 +861,7 @@ interrupts = ; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; + power-domains = <&msc_pd>; #iommu-cells = <0>; }; @@ -840,6 +872,7 @@ interrupts = <27 2>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; + power-domains = <&msc_pd>; #iommu-cells = <0>; }; @@ -850,6 +883,7 @@ interrupts = <22 6>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; + power-domains = <&msc_pd>; #iommu-cells = <0>; }; @@ -860,6 +894,7 @@ interrupts = <19 6>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; + power-domains = <&msc_pd>; #iommu-cells = <0>; };