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Wed, 25 Jan 2017 11:55:59 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Inki Dae Subject: [PATCH 2/8] arm64: dts: exynos: Add GSCL power domain to Exynos 5433 SoC Date: Wed, 25 Jan 2017 12:55:36 +0100 Message-id: <1485345342-3273-3-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrCIsWRmVeSWpSXmKPExsWy7djPc7rBkzoiDC4sY7XYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKC6b lNSczLLUIn27BK6M7283sxfcEKp4s+MvYwPjWb4uRk4OCQETibu7b7NB2GISF+6tB7K5OIQE ljFKHH97hQnC+cwo8f/+BHaYjtcbvzLDVa0+fpgFwmlgkjg07xcLSBWbgKFE19susLkiAvYS t58sYwcpYhZoY5LYdauNtYuRg0NYIFhi89p0kBoWAVWJ/fc3MoLYvALuEh9+tDJDbJOTOHls MiuIzSngIdH1tB/sJAmB12wSa3ecYwKZIyEgK7HpAFS9i0TL/h9Q/whLvDq+BepqGYnLk7tZ IOx+RommVm0IewajxLm3vBC2tcTh4xfBdjEL8ElM2jadGWI8r0RHmxBEiYfEh68vWSFsR4lp DxqhATGbUeLp+32MExhlFjAyrGIUSS0tzk1PLTbUK07MLS7NS9dLzs/dxAiM29P/jr/fwfi0 OeQQowAHoxIP74uU9ggh1sSy4srcQ4wSHMxKIrxLJnZECPGmJFZWpRblxxeV5qQWH2KU5mBR Eufdu+BKuJBAemJJanZqakFqEUyWiYNTqoGx8qHz9Az2qr3p09i6XwYv64hx/Hxj29vDdT/V ZtQon464fL7T7Jh3wKagT7zTPXLb515yrHKqKLqaWf6NLbs7Ryh2sWDJnbrrIQrnhPvnu8y+ 5/S3tcn/4EHZqer7NKY0tGQ6nY7f1N17Ul/3xIa+BYeYT2z8ZjnpVp6DXv21CKc7X1f7Xvyv xFKckWioxVxUnAgAt1tfH9cCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKLMWRmVeSWpSXmKPExsVy+t/xK7o+kzoiDNbssrbYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKDeb jNTElNQihdS85PyUzLx0W6XQEDddCyWFvMTcVFulCF3fkCAlhbLEnFIgz8gADTg4B7gHK+nb JbhlfH+7mb3ghlDFmx1/GRsYz/J1MXJySAiYSLze+JUZwhaTuHBvPVsXIxeHkMASRom7s88x QjhNTBIfV+4Eq2ITMJToetvFBmKLCNhL3H6yjB2kiFmgg0ni350WsISwQLDE9K/32UFsFgFV if33NzKC2LwC7hIffrRCrZOTOHlsMiuIzSngIdH1tJ8JxBYCqpl6cy3LBEbeBYwMqxhFUkuL c9Nzi430ihNzi0vz0vWS83M3MQKDeNuxn1t2MHa9Cz7EKMDBqMTDOyGpPUKINbGsuDL3EKME B7OSCK9DS0eEEG9KYmVValF+fFFpTmrxIUZToKMmMkuJJucDIyyvJN7QxNDc0tDI2MLC3MhI SZx36ocr4UIC6YklqdmpqQWpRTB9TBycUg2MPNM7nnM6XPwr3fer5G/NxnDt6fnyypzG016F dhpd5atIuTD9fqXyn42Ca9QzJgilnT1+5fgWricXVD9vnnqt4/ji3zIsFkoWN/fO0740m1ul r/FyrGvehILC29xi+xOfVbya8UD320XhLZssKl7Jyu+4Yi1+vU3OiKWDo+n/2R98qtrpbLtY lFiKMxINtZiLihMBuUfziXgCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170125115559eucas1p1a219b6ae0fef16bbdb68645328b61a5e X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170125115559eucas1p1a219b6ae0fef16bbdb68645328b61a5e X-RootMTR: 20170125115559eucas1p1a219b6ae0fef16bbdb68645328b61a5e References: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support for GSCL power domain to Exynos 5433 SoCs, which contains following devices: a clock controller, three GSCL video scalers and their SYSMMUs. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 16072c1c3ed3..74c767d756ac 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -425,6 +425,7 @@ clocks = <&xxti>, <&cmu_top CLK_ACLK_GSCL_111>, <&cmu_top CLK_ACLK_GSCL_333>; + power-domains = <&pd_gscl>; }; cmu_apollo: clock-controller@11900000 { @@ -525,6 +526,12 @@ <&cmu_top CLK_ACLK_CAM1_552>; }; + pd_gscl: gscl-power-domain@105c4000 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4000 0x20>; + #power-domain-cells = <0>; + }; + tmu_atlas0: tmu@10060000 { compatible = "samsung,exynos5433-tmu"; reg = <0x10060000 0x200>; @@ -892,6 +899,7 @@ <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>; iommus = <&sysmmu_gscl0>; + power-domains = <&pd_gscl>; }; gsc_1: video-scaler@13C10000 { @@ -905,6 +913,7 @@ <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>; iommus = <&sysmmu_gscl1>; + power-domains = <&pd_gscl>; }; gsc_2: video-scaler@13C20000 { @@ -918,6 +927,7 @@ <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>; iommus = <&sysmmu_gscl2>; + power-domains = <&pd_gscl>; }; jpeg: codec@15020000 { @@ -992,6 +1002,7 @@ clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, <&cmu_gscl CLK_PCLK_SMMU_GSCL0>; #iommu-cells = <0>; + power-domains = <&pd_gscl>; }; sysmmu_gscl1: sysmmu@13c90000 { @@ -1002,6 +1013,7 @@ clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, <&cmu_gscl CLK_PCLK_SMMU_GSCL1>; #iommu-cells = <0>; + power-domains = <&pd_gscl>; }; sysmmu_gscl2: sysmmu@13ca0000 { @@ -1012,6 +1024,7 @@ clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, <&cmu_gscl CLK_PCLK_SMMU_GSCL2>; #iommu-cells = <0>; + power-domains = <&pd_gscl>; }; sysmmu_jpeg: sysmmu@15060000 {