From patchwork Fri Dec 16 12:27:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 88296 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp1374352qgi; Fri, 16 Dec 2016 04:27:50 -0800 (PST) X-Received: by 10.99.143.9 with SMTP id n9mr5120267pgd.133.1481891269931; Fri, 16 Dec 2016 04:27:49 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h189si7617968pfb.15.2016.12.16.04.27.49; Fri, 16 Dec 2016 04:27:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756867AbcLPM1s (ORCPT + 4 others); Fri, 16 Dec 2016 07:27:48 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:41467 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756602AbcLPM1s (ORCPT ); Fri, 16 Dec 2016 07:27:48 -0500 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OIA01NEK2LT4L10@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 16 Dec 2016 21:27:46 +0900 (KST) X-AuditID: cbfee61a-f79916d0000062de-c1-5853ddc13cc8 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 4E.12.25310.1CDD3585; Fri, 16 Dec 2016 21:27:45 +0900 (KST) Received: from AMDC2765.digital.local ([106.116.147.25]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OIA00KJE2M36A90@mmp1.samsung.com>; Fri, 16 Dec 2016 21:27:45 +0900 (KST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH] ARM: dts: exynos: Enable DMA support for UART modules on Exynos542x SoCs Date: Fri, 16 Dec 2016 13:27:34 +0100 Message-id: <1481891254-7992-1-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrALMWRmVeSWpSXmKPExsVy+t9jAd2Dd4MjDG6+sLbYOGM9q8X58xvY LWac38dksfbIXXaLw2/aWR1YPTat6mTz6NuyitHj8ya5AOYoN5uM1MSU1CKF1Lzk/JTMvHRb pdAQN10LJYW8xNxUW6UIXd+QICWFssScUiDPyAANODgHuAcr6dsluGXMWreXtaCDq6Lt/mT2 BsbpHF2MHBwSAiYSTU+suxg5gUwxiQv31rN1MXJxCAksZZRoe3yNGcL5xSixf+cFVpAqNgFD ia63XWwgtoiAqsTntgXsIEXMAvsZJc5vfcYMkhAWiJZY/OgeWBELUNHH2ZPZQbbxCrhL9HTU QGyTkzh5bDLrBEbuBYwMqxglUguSC4qT0nMN81LL9YoTc4tL89L1kvNzNzGCQ++Z1A7Gg7vc DzEKcDAq8fAu2BIUIcSaWFZcmXuIUYKDWUmEV/BOcIQQb0piZVVqUX58UWlOavEhRlOg/ROZ pUST84FxkVcSb2hibmJubGBhbmlpYqQkzts4+1m4kEB6YklqdmpqQWoRTB8TB6dUA+Pec17b FGVW6k9jf3fh887HV6sW3j6U2+JZq/1rq92n4vWJSw8GZl5uOfPlj/4frnT7ht9uFbOf7p1+ 8J6QpU3b8gyJGzaXX6Vv+dN/Qn/xkSLjSwaymsESQs9EX2xRVv7yKHGLxpof0pYrgntMjeUa ZJoed9iHXRPLsYwKWRr0em78/Bmas6YrsRRnJBpqMRcVJwIAtzVwOFMCAAA= X-MTR: 20000000000000000@CPGS Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org UART modules can use DMA for offloading data transfers and reducing interrupts, so enable this feature for Exynos542x boards. Tested on Odroid XU3. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos5420.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 906a1a4..99c9336 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -1406,21 +1406,29 @@ &serial_0 { clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 13>, <&pdma0 14>; + dma-names = "rx", "tx"; }; &serial_1 { clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 15>, <&pdma0 16>; + dma-names = "rx", "tx"; }; &serial_2 { clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 15>, <&pdma0 16>; + dma-names = "rx", "tx"; }; &serial_3 { clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 17>, <&pdma0 18>; + dma-names = "rx", "tx"; }; &sss {