From patchwork Tue Jan 5 12:52:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 59179 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp5948683lbb; Tue, 5 Jan 2016 04:53:16 -0800 (PST) X-Received: by 10.98.65.140 with SMTP id g12mr79559242pfd.81.1451998392099; Tue, 05 Jan 2016 04:53:12 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k84si23896228pfj.113.2016.01.05.04.53.11; Tue, 05 Jan 2016 04:53:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751798AbcAEMxK (ORCPT + 4 others); Tue, 5 Jan 2016 07:53:10 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:54941 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751590AbcAEMxJ (ORCPT ); Tue, 5 Jan 2016 07:53:09 -0500 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O0H00IN1D4IOT40@mailout2.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 05 Jan 2016 12:53:06 +0000 (GMT) X-AuditID: cbfec7f4-f79026d00000418a-0c-568bbcb28d00 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 21.FC.16778.2BCBB865; Tue, 5 Jan 2016 12:53:06 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O0H00EDGD48I840@eusync2.samsung.com>; Tue, 05 Jan 2016 12:53:06 +0000 (GMT) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Daniel Vetter , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Gustavo Padovan Subject: [PATCH 2/4] drm/exynos: crtc: rework atomic_{begin,flush} Date: Tue, 05 Jan 2016 13:52:51 +0100 Message-id: <1451998373-13708-3-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1451998373-13708-1-git-send-email-m.szyprowski@samsung.com> References: <1451998373-13708-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBLMWRmVeSWpSXmKPExsVy+t/xK7qb9nSHGey/Jmxxa905VouNM9az WvzfNpHZ4srX92wWOx/sYreYdH8Ci8WLexdZLF6/MLSYcX4fk8XaI3fZLWZMfslm0bb6A6vF 938LmRx4PfZ+W8DiMe9koMf97uNMHv+OsXvsnLSXyaNvyypGj8+b5ALYo7hsUlJzMstSi/Tt ErgyVt17zVJwyL7i/e921gbG2aZdjJwcEgImEv1z97JD2GISF+6tZ+ti5OIQEljKKLG9eSET hNPEJPH64Vc2kCo2AUOJrrddYLaIgJtE0+GZrCBFzAK/mCVa7+wDGyUs4CQx/UoDM4jNIqAq cf3YVJYuRg4OXgEPieN3xCG2yUn8f7mCCcTmFPCUOP1pMiNIiRBQyZcrQRMYeRcwMqxiFE0t TS4oTkrPNdQrTswtLs1L10vOz93ECAnPLzsYFx+zOsQowMGoxMPL8bIrTIg1say4MvcQowQH s5IIr/OS7jAh3pTEyqrUovz4otKc1OJDjNIcLErivHN3vQ8REkhPLEnNTk0tSC2CyTJxcEo1 MLLwb5+hv/WDxjLZhBq3iBKp/2X8V1Y1Kfrai+f/PfR+Z+XbRM+o1i3TWo4cMHzLvZ7HYPnm pkI3bROWj7M8BZlffVwYkeUXsojFrfJ4hALvu8XMU8r+5b//UisYd9LT9cuTFPXbWj0nE/N5 zt3Ze8HedxuvicqbXIt1Ioe5axXOVDtttXsjpsRSnJFoqMVcVJwIAIpdpP9LAgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Some CRTC drivers (like Exynos DRM Mixer) can handle blocking register updates only on per-device level, not per-plane level. This patch changes exynos_crts atomic_begin/atomic_flush callbacks to handle the entire crtc, instead of given planes, so driver can handle both cases on their own. Signed-off-by: Marek Szyprowski --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 14 ++++++++------ drivers/gpu/drm/exynos/exynos7_drm_decon.c | 14 ++++++++------ drivers/gpu/drm/exynos/exynos_drm_crtc.c | 20 ++++---------------- drivers/gpu/drm/exynos/exynos_drm_drv.h | 10 ++++------ drivers/gpu/drm/exynos/exynos_drm_fimd.c | 14 ++++++++------ 5 files changed, 32 insertions(+), 40 deletions(-) -- 1.9.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 77073d8faaa3..1bf6a21130c7 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -248,15 +248,16 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win, protect ? ~0 : 0); } -static void decon_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_begin(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i; if (test_bit(BIT_SUSPENDED, &ctx->flags)) return; - decon_shadow_protect_win(ctx, plane->index, true); + for (i = ctx->first_win; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, true); } #define BIT_VAL(x, e, s) (((x) & ((1 << ((e) - (s) + 1)) - 1)) << (s)) @@ -336,15 +337,16 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0); } -static void decon_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_flush(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i; if (test_bit(BIT_SUSPENDED, &ctx->flags)) return; - decon_shadow_protect_win(ctx, plane->index, false); + for (i = ctx->first_win; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, false); if (ctx->out_type == IFTYPE_I80) set_bit(BIT_WIN_UPDATED, &ctx->flags); diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index 8911f965b06c..52bda3b42fe0 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c @@ -385,15 +385,16 @@ static void decon_shadow_protect_win(struct decon_context *ctx, writel(val, ctx->regs + SHADOWCON); } -static void decon_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_begin(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i; if (ctx->suspended) return; - decon_shadow_protect_win(ctx, plane->index, true); + for (i = 0; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, true); } static void decon_update_plane(struct exynos_drm_crtc *crtc, @@ -517,15 +518,16 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, writel(val, ctx->regs + DECON_UPDATE); } -static void decon_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_flush(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i; if (ctx->suspended) return; - decon_shadow_protect_win(ctx, plane->index, false); + for (i = 0; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, false); } static void decon_init(struct decon_context *ctx) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index efecd916f797..150a43025861 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -68,32 +68,20 @@ static void exynos_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); - struct drm_plane *plane; exynos_crtc->event = crtc->state->event; - drm_atomic_crtc_for_each_plane(plane, crtc) { - struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); - - if (exynos_crtc->ops->atomic_begin) - exynos_crtc->ops->atomic_begin(exynos_crtc, - exynos_plane); - } + if (exynos_crtc->ops->atomic_begin) + exynos_crtc->ops->atomic_begin(exynos_crtc); } static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); - struct drm_plane *plane; - drm_atomic_crtc_for_each_plane(plane, crtc) { - struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); - - if (exynos_crtc->ops->atomic_flush) - exynos_crtc->ops->atomic_flush(exynos_crtc, - exynos_plane); - } + if (exynos_crtc->ops->atomic_flush) + exynos_crtc->ops->atomic_flush(exynos_crtc); } static const struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index f0827dbebb7d..17b5ded72ff1 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -123,8 +123,8 @@ struct exynos_drm_plane_config { * @wait_for_vblank: wait for vblank interrupt to make sure that * hardware overlay is updated. * @atomic_check: validate state - * @atomic_begin: prepare a window to receive a update - * @atomic_flush: mark the end of a window update + * @atomic_begin: prepare device to receive an update + * @atomic_flush: mark the end of device update * @update_plane: apply hardware specific overlay data to registers. * @disable_plane: disable hardware specific overlay. * @te_handler: trigger to transfer video image at the tearing effect @@ -144,14 +144,12 @@ struct exynos_drm_crtc_ops { void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); int (*atomic_check)(struct exynos_drm_crtc *crtc, struct drm_crtc_state *state); - void (*atomic_begin)(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane); + void (*atomic_begin)(struct exynos_drm_crtc *crtc); void (*update_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); void (*disable_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); - void (*atomic_flush)(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane); + void (*atomic_flush)(struct exynos_drm_crtc *crtc); void (*te_handler)(struct exynos_drm_crtc *crtc); void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); }; diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 6ae1b1e55783..70194d0e4fe4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -622,26 +622,28 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx, writel(val, ctx->regs + reg); } -static void fimd_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void fimd_atomic_begin(struct exynos_drm_crtc *crtc) { struct fimd_context *ctx = crtc->ctx; + int i; if (ctx->suspended) return; - fimd_shadow_protect_win(ctx, plane->index, true); + for (i = 0; i < WINDOWS_NR; i++) + fimd_shadow_protect_win(ctx, i, true); } -static void fimd_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void fimd_atomic_flush(struct exynos_drm_crtc *crtc) { struct fimd_context *ctx = crtc->ctx; + int i; if (ctx->suspended) return; - fimd_shadow_protect_win(ctx, plane->index, false); + for (i = 0; i < WINDOWS_NR; i++) + fimd_shadow_protect_win(ctx, i, false); } static void fimd_update_plane(struct exynos_drm_crtc *crtc,