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[54.225.227.206]) by mx.google.com with ESMTPS id b19si2164933qaw.25.2014.08.05.03.49.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 05 Aug 2014 03:49:36 -0700 (PDT) Received-SPF: none (google.com: linaro-mm-sig-bounces@lists.linaro.org does not designate permitted sender hosts) client-ip=54.225.227.206; Received: from localhost ([127.0.0.1] helo=ip-10-141-164-156.ec2.internal) by ip-10-141-164-156.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XEcJC-0005JX-Tb; Tue, 05 Aug 2014 10:49:34 +0000 Received: from mailout2.w1.samsung.com ([210.118.77.12]) by ip-10-141-164-156.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XEcId-0005Ee-3R for linaro-mm-sig@lists.linaro.org; Tue, 05 Aug 2014 10:48:59 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N9T00HPEY0XJM90@mailout2.w1.samsung.com> for linaro-mm-sig@lists.linaro.org; Tue, 05 Aug 2014 11:48:33 +0100 (BST) X-AuditID: cbfec7f4-b7f156d0000063c7-a1-53e0b693f17f Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 39.0C.25543.396B0E35; Tue, 05 Aug 2014 11:48:51 +0100 (BST) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync3.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N9T0057MY17SE80@eusync3.samsung.com>; Tue, 05 Aug 2014 11:48:51 +0100 (BST) From: Marek Szyprowski To: iommu@lists.linux-foundation.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Tue, 05 Aug 2014 12:47:31 +0200 Message-id: <1407235677-26324-4-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1407235677-26324-1-git-send-email-m.szyprowski@samsung.com> References: <1407235677-26324-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrOLMWRmVeSWpSXmKPExsVy+t/xq7qTtz0INth8Sd7i76Rj7BbNi9ez WUy6P4HFYsF+a4vO2RvYLXoXXGWzONv0ht2ic+ISdosvVx4yWWx6fI3V4vKuOWwWM87vY7JY e+Quu8Wp65/ZLP71HmS0OHP6EqvF/z072C0Ov2lntTjycDe7xapdfxgtbv/mcxD1eHJwHpPH 71+TGD12zrrL7jG7Yyarx6ZVnWwe++euYffYvKTe4/a/x8wek28sZ/S4cqKJ1aO3+R2bx5ar 7SwefVtWMXp83iQXwBfFZZOSmpNZllqkb5fAlXHwdztTwUm+imvbYxsYV/J0MXJySAiYSHyf +5AdwhaTuHBvPVsXIxeHkMBSRondzyewQjh9TBJ3Dn5jBKliEzCU6HrbBVYlItDLKNHf9IMJ xGEWWMcqsb/3OgtIlbBAiMS8bQ1gNouAqsTRCVdYQWxeAQ+J7jtvoPbJSfx/uYIJxOYU8JQ4 fPMAWI0QUM3PDWvYJzDyLmBkWMUomlqaXFCclJ5rqFecmFtcmpeul5yfu4kREjlfdjAuPmZ1 iFGAg1GJh9fg9N1gIdbEsuLK3EOMEhzMSiK8EmseBAvxpiRWVqUW5ccXleakFh9iZOLglGpg nH+m9W75+a28dSsE70R/bRf/nvAqz/JL8d9pL35U8rnNmvN0pdCrlceeWReo5M24oOSucuNZ 3LFnrxefL0lJfmfII2f4WCNlscEJxSdlt686ZgpERP+9uPrGfPH8cr4zm/g096v8mMMQ9Mm7 lu8zN/eUmFmNd/zDd/GUmM95V7pq3Y/DvH11G5RYijMSDbWYi4oTAcXms1V6AgAA Cc: Rob Herring , Thierry Reding , Shaik Ameer Basha , Arnd Bergmann , Inki Dae , Greg Kroah-Hartman , Joerg Roedel , "Rafael J. Wysocki" , Tomasz Figa , linaro-mm-sig@lists.linaro.org, Kyungmin Park , Kukjin Kim , Laurent Pinchart , Sylwester Nawrocki , Olof Johansson , Cho KyongHo Subject: [Linaro-mm-sig] [PATCH 03/29] clk: exynos: add missing smmu_g2d clock and update comments X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-mm-sig-bounces@lists.linaro.org Sender: linaro-mm-sig-bounces@lists.linaro.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: m.szyprowski@samsung.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This patch adds missing smmu_g2d clock implementation and updates comment about Exynos4 clocks from 278-282 range. Those clocks are available on all Exynos4 SoC series, so the misleading comment has been removed. Signed-off-by: Marek Szyprowski Acked-by: Tomasz Figa --- drivers/clk/samsung/clk-exynos4.c | 1 + include/dt-bindings/clock/exynos4.h | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index ac163d7..12a7cc3 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1183,6 +1183,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(CLK_SPI1_ISP, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(CLK_G2D, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0), + GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk200", GATE_IP_DMC, 24, 0, 0), GATE(CLK_TMU_APBIF, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0), }; diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index 459bd2b..fb981635 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -115,11 +115,11 @@ #define CLK_SMMU_MFCR 275 #define CLK_G3D 276 #define CLK_G2D 277 -#define CLK_ROTATOR 278 /* Exynos4210 only */ -#define CLK_MDMA 279 /* Exynos4210 only */ -#define CLK_SMMU_G2D 280 /* Exynos4210 only */ -#define CLK_SMMU_ROTATOR 281 /* Exynos4210 only */ -#define CLK_SMMU_MDMA 282 /* Exynos4210 only */ +#define CLK_ROTATOR 278 +#define CLK_MDMA 279 +#define CLK_SMMU_G2D 280 +#define CLK_SMMU_ROTATOR 281 +#define CLK_SMMU_MDMA 282 #define CLK_FIMD0 283 #define CLK_MIE0 284 #define CLK_MDNIE0 285 /* Exynos4412 only */