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[54.225.227.206]) by mx.google.com with ESMTPS id 5si2137828qam.91.2014.08.05.03.49.52 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 05 Aug 2014 03:49:52 -0700 (PDT) Received-SPF: none (google.com: linaro-mm-sig-bounces@lists.linaro.org does not designate permitted sender hosts) client-ip=54.225.227.206; Received: from localhost ([127.0.0.1] helo=ip-10-141-164-156.ec2.internal) by ip-10-141-164-156.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XEcJT-0005Ld-KE; Tue, 05 Aug 2014 10:49:51 +0000 Received: from mailout1.w1.samsung.com ([210.118.77.11]) by ip-10-141-164-156.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XEcId-0005Ef-OI for linaro-mm-sig@lists.linaro.org; Tue, 05 Aug 2014 10:49:00 +0000 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N9T00DKIY1H7Y00@mailout1.w1.samsung.com> for linaro-mm-sig@lists.linaro.org; Tue, 05 Aug 2014 11:48:53 +0100 (BST) X-AuditID: cbfec7f5-b7f776d000003e54-94-53e0b69b2d7d Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id D7.DC.15956.B96B0E35; Tue, 05 Aug 2014 11:48:59 +0100 (BST) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync3.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N9T0057MY17SE80@eusync3.samsung.com>; Tue, 05 Aug 2014 11:48:59 +0100 (BST) From: Marek Szyprowski To: iommu@lists.linux-foundation.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Tue, 05 Aug 2014 12:47:40 +0200 Message-id: <1407235677-26324-13-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1407235677-26324-1-git-send-email-m.szyprowski@samsung.com> References: <1407235677-26324-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBLMWRmVeSWpSXmKPExsVy+t/xq7qztz0INjjXLmnxd9IxdovmxevZ LCbdn8BisWC/tUXn7A3sFr0LrrJZnG16w27ROXEJu8WXKw+ZLDY9vsZqcXnXHDaLGef3MVms PXKX3eLU9c9sFv96DzJanDl9idXi/54d7BaH37SzWhx5uJvdYtWuP4wWt3/zOYh6PDk4j8nj 969JjB47Z91l95jdMZPVY9OqTjaP/XPXsHtsXlLvcfvfY2aPyTeWM3pcOdHE6tHb/I7NY8vV dhaPvi2rGD0+b5IL4IvisklJzcksSy3St0vgylg0eQVzwW6BimM7brM1MK7h7WLk5JAQMJG4 2fuFHcIWk7hwbz1bFyMXh5DAUkaJ/Ze2MEI4fUwSM6f2MYJUsQkYSnS97QKrEhHoZZTob/rB BOIwC6xjldjfe50FpEpYwFLiZvN0JhCbRUBV4tucfWDdvAKeEt9frGaC2Ccn8f/lCjCbEyh+ +OYBVhBbSMBD4ueGNewTGHkXMDKsYhRNLU0uKE5KzzXSK07MLS7NS9dLzs/dxAiJna87GJce szrEKMDBqMTDq7D3brAQa2JZcWXuIUYJDmYlEV6JNQ+ChXhTEiurUovy44tKc1KLDzEycXBK NTDu/HBc9X2A9nfTmwnli26+LXPp1LA88OfZ4o86mafc5uxq3Ma+aNWqQMmcf28FT034fK+Z a++DFb2818za2z6v2yfH9EOD7f7fjL0xU/9q7WTnOvNMwE14XnmCx8b35/Zf+7y0Rnq16vE7 Mz7s7Tx1oTbuu2Xahu0qGbF7n3a7/FLjK/t/7+iRZ0osxRmJhlrMRcWJAL2Rb+57AgAA Cc: Rob Herring , Thierry Reding , Shaik Ameer Basha , Arnd Bergmann , Inki Dae , Greg Kroah-Hartman , Joerg Roedel , "Rafael J. Wysocki" , Tomasz Figa , linaro-mm-sig@lists.linaro.org, Kyungmin Park , Kukjin Kim , Laurent Pinchart , Sylwester Nawrocki , Olof Johansson , Cho KyongHo Subject: [Linaro-mm-sig] [PATCH 12/29] DRM: Exynos: fix window clear code X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-mm-sig-bounces@lists.linaro.org Sender: linaro-mm-sig-bounces@lists.linaro.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: m.szyprowski@samsung.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To correctly disable hardware window during driver init, both enable bits (WINCONx_ENWIN in WINCON and SHADOWCON_CHx_ENABLE in SHADOWCON) must be cleared, otherwise hardware fails to re-enable such window later. While touching this function, also temporarily disable ctx->suspended flag to let fimd_wait_for_vblank function really to do its job. Signed-off-by: Marek Szyprowski --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 41904df..7a363d2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -165,27 +165,38 @@ static void fimd_wait_for_vblank(struct exynos_drm_manager *mgr) DRM_DEBUG_KMS("vblank wait timed out.\n"); } - static void fimd_clear_channel(struct exynos_drm_manager *mgr) { struct fimd_context *ctx = mgr->ctx; - int win, ch_enabled = 0; + int state, win, ch_enabled = 0; DRM_DEBUG_KMS("%s\n", __FILE__); /* Check if any channel is enabled. */ for (win = 0; win < WINDOWS_NR; win++) { - u32 val = readl(ctx->regs + SHADOWCON); - if (val & SHADOWCON_CHx_ENABLE(win)) { - val &= ~SHADOWCON_CHx_ENABLE(win); - writel(val, ctx->regs + SHADOWCON); + u32 val = readl(ctx->regs + WINCON(win)); + if (val & WINCONx_ENWIN) { + /* wincon */ + val &= ~WINCONx_ENWIN; + writel(val, ctx->regs + WINCON(win)); + + /* unprotect windows */ + if (ctx->driver_data->has_shadowcon) { + val = readl(ctx->regs + SHADOWCON); + val &= ~SHADOWCON_CHx_ENABLE(win); + writel(val, ctx->regs + SHADOWCON); + } ch_enabled = 1; } } /* Wait for vsync, as disable channel takes effect at next vsync */ - if (ch_enabled) + if (ch_enabled) { + state = ctx->suspended; + ctx->suspended = 0; fimd_wait_for_vblank(mgr); + ctx->suspended = state; + } } static int fimd_mgr_initialize(struct exynos_drm_manager *mgr,