From patchwork Fri Nov 11 06:29:37 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Daniel Kachhap X-Patchwork-Id: 5059 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0A71323E01 for ; Fri, 11 Nov 2011 06:30:31 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id F3BA4A18397 for ; Fri, 11 Nov 2011 06:30:30 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id n26so5311063faa.11 for ; Thu, 10 Nov 2011 22:30:30 -0800 (PST) Received: by 10.152.104.1 with SMTP id ga1mr5999234lab.40.1320993030832; Thu, 10 Nov 2011 22:30:30 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.40.7 with SMTP id t7cs37422lak; Thu, 10 Nov 2011 22:30:30 -0800 (PST) Received: by 10.52.92.84 with SMTP id ck20mr18403385vdb.88.1320993028747; Thu, 10 Nov 2011 22:30:28 -0800 (PST) Received: from mail-yw0-f50.google.com (mail-yw0-f50.google.com [209.85.213.50]) by mx.google.com with ESMTPS id a9si320440ybc.41.2011.11.10.22.30.28 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 10 Nov 2011 22:30:28 -0800 (PST) Received-SPF: pass (google.com: domain of amitdanielk@gmail.com designates 209.85.213.50 as permitted sender) client-ip=209.85.213.50; Authentication-Results: mx.google.com; spf=pass (google.com: domain of amitdanielk@gmail.com designates 209.85.213.50 as permitted sender) smtp.mail=amitdanielk@gmail.com; dkim=pass (test mode) header.i=@gmail.com Received: by mail-yw0-f50.google.com with SMTP id 13so1359505ywm.37 for ; Thu, 10 Nov 2011 22:30:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=ZXqFb+D8V8iemiFF0mcmJUypDvLPRDz4SPinSGv6uY8=; b=HzX9fXyUWg8FMvdZ8SxIzViQyYOprQiqr7AfpnCv9iaQEoxd4zs1rP9kCvP56PnPZp B1SyGVEwd6Ixu3M2b3Icb55A645cgfvkGSMkM419W/lp5819A/RyWDoA3BPRudw2QEf4 Xj0ddW73BoH0r8caV1BFs3d3KbBcAzkjXbmzk= Received: by 10.68.28.3 with SMTP id x3mr20912720pbg.132.1320993027870; Thu, 10 Nov 2011 22:30:27 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id jm5sm27653704pbc.1.2011.11.10.22.30.23 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 10 Nov 2011 22:30:27 -0800 (PST) Sender: amit kachhap From: Amit Daniel Kachhap To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, amit.kachhap@linaro.org, patches@linaro.org Subject: [PATCH V2 5/5] ARM: exynos4: Enable l2 configuration through device tree Date: Fri, 11 Nov 2011 11:59:37 +0530 Message-Id: <1320992977-11589-6-git-send-email-amit.kachhap@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1320992977-11589-1-git-send-email-amit.kachhap@linaro.org> References: <1320992977-11589-1-git-send-email-amit.kachhap@linaro.org> This patch enables calling generic l2 setup functions if device tree is used. Signed-off-by: Amit Daniel Kachhap --- arch/arm/mach-exynos/cpu.c | 12 ++++++++++-- 1 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c index 252e346..b62a90f 100644 --- a/arch/arm/mach-exynos/cpu.c +++ b/arch/arm/mach-exynos/cpu.c @@ -37,6 +37,9 @@ #include #include +#define L2_AUX_VAL 0x7C470001 +#define L2_AUX_MASK 0xC200ffff + unsigned int gic_bank_offset __read_mostly; extern int combiner_init(unsigned int combiner_nr, void __iomem *base, @@ -299,6 +302,7 @@ core_initcall(exynos4_core_init); #ifdef CONFIG_CACHE_L2X0 static int __init exynos4_l2x0_cache_init(void) { +#ifndef CONFIG_OF if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; /* TAG, Data Latency Control: 2 cycles */ @@ -332,8 +336,12 @@ static int __init exynos4_l2x0_cache_init(void) clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); } - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); - + l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); +#else + l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); +#endif return 0; }