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I tried to follow already established design for Samsung clock drivers (getting most insights from Exynos5433 clock driver), and integrate the driver into existing infrastructure. The whole driver was implemented from scratch, using mostly TRM and downstream kernel for clock dependencies/hierarchy info. For now only basic clocks are implemented, including next blocks: - CMU_TOP - CMU_PERI - CMU_CORE - CMU_HSI - CMU_DPU Some CMUs are still not implemented, but that can be added in future, when the need arises. The driver also lacks CLKOUT support, PM ops and automatic clocks control (using Q-Channel protocol). All that can be added independently later. Implemented clock tree was tested via UART and MMC drivers, and using DebugFS clk support (e.g. using 'clk_summary' file). In order to keep all clocks running I added 'clk_ignore_unused' kernel param in my local tree, and defined CLOCK_ALLOW_WRITE_DEBUGFS in clk.c for actually testing the clocks via DebugFS. Changes in v3: - Changed the licence for bindings header to GPL+BSD - Added R-b tag by Krzysztof Kozlowski to patches 4/5 and 5/5 Changes in v2: - Added CMU_DPU implementation - Moved bus clock enablement to clk-exynos850.c - See also "v2 changes" list in each particular patch Sam Protsenko (5): clk: samsung: clk-pll: Implement pll0822x PLL type clk: samsung: clk-pll: Implement pll0831x PLL type dt-bindings: clock: Add bindings definitions for Exynos850 CMU dt-bindings: clock: Document Exynos850 CMU bindings clk: samsung: Introduce Exynos850 clock driver .../clock/samsung,exynos850-clock.yaml | 185 ++++ drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos850.c | 835 ++++++++++++++++++ drivers/clk/samsung/clk-pll.c | 196 ++++ drivers/clk/samsung/clk-pll.h | 2 + include/dt-bindings/clock/exynos850.h | 141 +++ 6 files changed, 1360 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml create mode 100644 drivers/clk/samsung/clk-exynos850.c create mode 100644 include/dt-bindings/clock/exynos850.h -- 2.30.2