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[209.132.180.67]) by mx.google.com with ESMTP id n8si20544144pgd.755.2017.12.26.02.31.39; Tue, 26 Dec 2017 02:31:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=gcMS18rG; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751422AbdLZKbi (ORCPT + 4 others); Tue, 26 Dec 2017 05:31:38 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:40216 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751385AbdLZKbd (ORCPT ); Tue, 26 Dec 2017 05:31:33 -0500 Received: by mail-wm0-f68.google.com with SMTP id f206so34335112wmf.5 for ; Tue, 26 Dec 2017 02:31:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vcZxQXjiZ4WeoVIVaraKKVAjq9WCyQ24svdTHBSp84Q=; b=gcMS18rGzxLGBu3BZz9dJTgKO2yI19QZ/q7kT0o3adrCYTzh4NNxiXPUbukuoYOKn3 TPi37yCtL0x29+xdfSOO3TqmYFqGvLI9D/hP7UIT/wutBVIgKiuzIB/qpA9hx80kXWxv /wtZgpmtHOAnfbnKmveuy8rK2pJV8nH55xuqE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vcZxQXjiZ4WeoVIVaraKKVAjq9WCyQ24svdTHBSp84Q=; b=FZyhfR1VtY/6r/4PGONlj5kffPJAM1tBG7FizctCNfP3YFPKhUm3Flyl7G6SYKpTTO 2GzGuAs1ZTbO4rU+XXFdW0B7n6zGoNAnVj/S9q7RXrAqz+ybZiyanth166H9GmQQvQKD pgyamaqQLAz+LZcUx6u9qXyQDMrVziEh4btoJ4j68dDxTsDjucROY2hm9lMFwvp2KXyN 63Z4kp3AR33+YevCueolIh260GfjzD5gDbKbHLrXWxhaobvqDhig9UHuQdwEWQ9lCTHd kyMeHFYphYD8Pv0cr28g9Vfp+4LvLqs+SpfsF2kvC8hoNjkKfz55vCCHVfHERaPkFqWJ K/9w== X-Gm-Message-State: AKGB3mLHgmWOvEalR8AemKzmbifGHd+PVGU4rSmwsAC4MM7+F5l9yMRw uq+/cYZuciiIyfiF+0KOkduMBA== X-Received: by 10.28.13.77 with SMTP id 74mr21644641wmn.51.1514284292674; Tue, 26 Dec 2017 02:31:32 -0800 (PST) Received: from localhost.localdomain ([160.171.216.245]) by smtp.gmail.com with ESMTPSA id l142sm13974036wmb.43.2017.12.26.02.31.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Dec 2017 02:31:32 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: Ard Biesheuvel , Dave Martin , Russell King - ARM Linux , Sebastian Andrzej Siewior , Mark Rutland , linux-rt-users@vger.kernel.org, Peter Zijlstra , Catalin Marinas , Will Deacon , Steven Rostedt , Thomas Gleixner Subject: [PATCH v4 19/20] crypto: arm64/crct10dif-ce - yield NEON after every block of input Date: Tue, 26 Dec 2017 10:29:39 +0000 Message-Id: <20171226102940.26908-20-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171226102940.26908-1-ard.biesheuvel@linaro.org> References: <20171226102940.26908-1-ard.biesheuvel@linaro.org> Sender: linux-rt-users-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rt-users@vger.kernel.org Avoid excessive scheduling delays under a preemptible kernel by yielding the NEON after every block of input. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/crct10dif-ce-core.S | 32 +++++++++++++++++--- 1 file changed, 28 insertions(+), 4 deletions(-) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/crypto/crct10dif-ce-core.S b/arch/arm64/crypto/crct10dif-ce-core.S index d5b5a8c038c8..5bce7833ca5f 100644 --- a/arch/arm64/crypto/crct10dif-ce-core.S +++ b/arch/arm64/crypto/crct10dif-ce-core.S @@ -74,13 +74,19 @@ .text .cpu generic+crypto - arg1_low32 .req w0 - arg2 .req x1 - arg3 .req x2 + arg1_low32 .req w19 + arg2 .req x20 + arg3 .req x21 vzr .req v13 ENTRY(crc_t10dif_pmull) + frame_push 3, 128 + + mov arg1_low32, w0 + mov arg2, x1 + mov arg3, x2 + movi vzr.16b, #0 // init zero register // adjust the 16-bit initial_crc value, scale it to 32 bits @@ -175,8 +181,25 @@ CPU_LE( ext v12.16b, v12.16b, v12.16b, #8 ) subs arg3, arg3, #128 // check if there is another 64B in the buffer to be able to fold - b.ge _fold_64_B_loop + b.lt _fold_64_B_end + + if_will_cond_yield_neon + stp q0, q1, [sp, #.Lframe_local_offset] + stp q2, q3, [sp, #.Lframe_local_offset + 32] + stp q4, q5, [sp, #.Lframe_local_offset + 64] + stp q6, q7, [sp, #.Lframe_local_offset + 96] + do_cond_yield_neon + ldp q0, q1, [sp, #.Lframe_local_offset] + ldp q2, q3, [sp, #.Lframe_local_offset + 32] + ldp q4, q5, [sp, #.Lframe_local_offset + 64] + ldp q6, q7, [sp, #.Lframe_local_offset + 96] + ldr q10, rk3 + movi vzr.16b, #0 // init zero register + endif_yield_neon + + b _fold_64_B_loop +_fold_64_B_end: // at this point, the buffer pointer is pointing at the last y Bytes // of the buffer the 64B of folded data is in 4 of the vector // registers: v0, v1, v2, v3 @@ -304,6 +327,7 @@ _barrett: _cleanup: // scale the result back to 16 bits lsr x0, x0, #16 + frame_pop ret _less_than_128: