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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000066EB.mail.protection.outlook.com (10.167.249.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7386.12 via Frontend Transport; Wed, 13 Mar 2024 10:01:00 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 13 Mar 2024 05:00:55 -0500 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH v7 6/6] cpufreq:amd-pstate: initialize capabilities in amd_pstate_init_perf Date: Wed, 13 Mar 2024 17:59:18 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000066EB:EE_|DS7PR12MB5813:EE_ X-MS-Office365-Filtering-Correlation-Id: c2064b59-b79b-447c-ab1d-08dc43447cbf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Mar 2024 10:01:00.7978 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c2064b59-b79b-447c-ab1d-08dc43447cbf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066EB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5813 Moved the initialization of some perf and frequency values related to cpudata to the amd_pstate_init_perf and cppc_init_perf functions. It can avoid duplicate calls to cppc_get_perf_caps function. Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 43 ++++++++++++++---------------------- include/linux/amd-pstate.h | 1 + 2 files changed, 18 insertions(+), 26 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 59bcdf829c93..3877d4ecb5d4 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -330,12 +330,18 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) { u64 cap1; u32 highest_perf; + struct cppc_perf_caps cppc_perf; + int ret; - int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, + ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &cap1); if (ret) return ret; + ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); + if (ret) + return ret; + /* For platforms that do not support the preferred core feature, the * highest_pef may be configured with 166 or 255, to avoid max frequency * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as @@ -353,6 +359,9 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1)); WRITE_ONCE(cpudata->prefcore_ranking, AMD_CPPC_HIGHEST_PERF(cap1)); WRITE_ONCE(cpudata->min_limit_perf, AMD_CPPC_LOWEST_PERF(cap1)); + WRITE_ONCE(cpudata->lowest_freq, cppc_perf.lowest_freq); + WRITE_ONCE(cpudata->nominal_freq, cppc_perf.nominal_freq); + return 0; } @@ -360,8 +369,9 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) { struct cppc_perf_caps cppc_perf; u32 highest_perf; + int ret; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); + ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); if (ret) return ret; @@ -378,6 +388,8 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) WRITE_ONCE(cpudata->lowest_perf, cppc_perf.lowest_perf); WRITE_ONCE(cpudata->prefcore_ranking, cppc_perf.highest_perf); WRITE_ONCE(cpudata->min_limit_perf, cppc_perf.lowest_perf); + WRITE_ONCE(cpudata->lowest_freq, cppc_perf.lowest_freq); + WRITE_ONCE(cpudata->nominal_freq, cppc_perf.nominal_freq); if (cppc_state == AMD_PSTATE_ACTIVE) return 0; @@ -642,17 +654,12 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_get_min_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; u32 lowest_freq; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - if (quirks && quirks->lowest_freq) lowest_freq = quirks->lowest_freq; else - lowest_freq = cppc_perf.lowest_freq; + lowest_freq = READ_ONCE(cpudata->lowest_freq); /* Switch to khz */ return lowest_freq * 1000; @@ -660,14 +667,9 @@ static int amd_get_min_freq(struct amd_cpudata *cpudata) static int amd_get_max_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; u32 max_perf, max_freq, nominal_freq, nominal_perf; u64 boost_ratio; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); max_perf = READ_ONCE(cpudata->highest_perf); @@ -683,36 +685,25 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata) static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; u32 nominal_freq; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - if (quirks && quirks->nominal_freq) nominal_freq = quirks->nominal_freq; else - nominal_freq = cppc_perf.nominal_freq; + nominal_freq = READ_ONCE(cpudata->nominal_freq); return nominal_freq; } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; u32 lowest_nonlinear_freq, lowest_nonlinear_perf, nominal_freq, nominal_perf; u64 lowest_nonlinear_ratio; - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - nominal_freq = READ_ONCE(cpudata->nominal_freq); nominal_perf = READ_ONCE(cpudata->nominal_perf); - - lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; + lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, nominal_perf); diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index 7b2cbb892fd9..1fbbe75c3dcc 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -88,6 +88,7 @@ struct amd_cpudata { u32 min_freq; u32 nominal_freq; u32 lowest_nonlinear_freq; + u32 lowest_freq; struct amd_aperf_mperf cur; struct amd_aperf_mperf prev;