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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EDD1.mail.protection.outlook.com (10.167.241.205) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7249.19 via Frontend Transport; Tue, 30 Jan 2024 05:57:09 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 29 Jan 2024 23:57:05 -0600 From: Perry Yuan To: , , , , , CC: , , , , , Subject: [PATCH Resend 6/8] tools/power x86_energy_perf_policy: remove the invalid feature options for AMD processors Date: Tue, 30 Jan 2024 13:56:30 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD1:EE_|CH3PR12MB9079:EE_ X-MS-Office365-Filtering-Correlation-Id: 2e24534e-3824-4248-81cf-08dc21584bbc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2024 05:57:09.0001 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2e24534e-3824-4248-81cf-08dc21584bbc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9079 EPB feature is not supported by AMD CPU, remove the unsupported options to advoid confusion for the failure result when using the parameters. Here is the new help output with below command. $ sudo ./x86_energy_perf_policy -h ./x86_energy_perf_policy [options] [scope][field value] scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force value: ( # | "normal" | "performance" | "balance-performance" | "balance-power"| "power") --hwp-window usec ./x86_energy_perf_policy: [-c cpu] [-v] (-r | policy-value ) Signed-off-by: Perry Yuan --- .../x86_energy_perf_policy.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c index 7bc668d22728..ada1aaabad8c 100644 --- a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c +++ b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c @@ -105,13 +105,18 @@ void usage(void) { fprintf(stderr, "%s [options] [scope][field value]\n", progname); fprintf(stderr, "scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list\n"); - fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n"); + + if (genuine_intel) + fprintf(stderr, "field: --all | --epb | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n"); + else if (authentic_amd) + fprintf(stderr, "field: --all | --hwp-epp | --hwp-min | --hwp-max | --hwp-desired\n"); + fprintf(stderr, "other: --hwp-enable | --turbo-enable (0 | 1) | --help | --force\n"); fprintf(stderr, "value: ( # | \"normal\" | \"performance\" | \"balance-performance\" | \"balance-power\"| \"power\")\n"); fprintf(stderr, "--hwp-window usec\n"); - - fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n"); + if (genuine_intel) + fprintf(stderr, "Specify only Energy Performance BIAS (legacy usage):\n"); fprintf(stderr, "%s: [-c cpu] [-v] (-r | policy-value )\n", progname); exit(1); @@ -1309,7 +1314,7 @@ int update_cpu_msrs(int cpu) unsigned long long msr; int epb; - if (update_epb) { + if (update_epb && genuine_intel) { epb = get_epb(cpu); set_epb(cpu, new_epb); @@ -1318,7 +1323,7 @@ int update_cpu_msrs(int cpu) cpu, epb, (unsigned int) new_epb); } - if (update_turbo) { + if (update_turbo && genuine_intel) { int turbo_is_present_and_disabled; intel_get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);