diff mbox series

[10/53] docs: admin-guide: pm: avoid using UTF-8 chars

Message ID 79d5dca9b4bd0cc3b128ece6ffa16c07b7178626.1620641727.git.mchehab+huawei@kernel.org
State New
Headers show
Series Get rid of UTF-8 chars that can be mapped as ASCII | expand

Commit Message

Mauro Carvalho Chehab May 10, 2021, 10:26 a.m. UTC
While UTF-8 characters can be used at the Linux documentation,
the best is to use them only when ASCII doesn't offer a good replacement.
So, replace the occurences of the following UTF-8 characters:

	- U+2019 ('’'): RIGHT SINGLE QUOTATION MARK

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 Documentation/admin-guide/pm/intel_idle.rst   | 4 ++--
 Documentation/admin-guide/pm/intel_pstate.rst | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/admin-guide/pm/intel_idle.rst b/Documentation/admin-guide/pm/intel_idle.rst
index 89309e1b0e48..c3c4f5d4c806 100644
--- a/Documentation/admin-guide/pm/intel_idle.rst
+++ b/Documentation/admin-guide/pm/intel_idle.rst
@@ -28,7 +28,7 @@  logical CPU executing it is idle and so it may be possible to put some of the
 processor's functional blocks into low-power states.  That instruction takes two
 arguments (passed in the ``EAX`` and ``ECX`` registers of the target CPU), the
 first of which, referred to as a *hint*, can be used by the processor to
-determine what can be done (for details refer to Intel Software Developer’s
+determine what can be done (for details refer to Intel Software Developer's
 Manual [1]_).  Accordingly, ``intel_idle`` refuses to work with processors in
 which the support for the ``MWAIT`` instruction has been disabled (for example,
 via the platform firmware configuration menu) or which do not support that
@@ -261,7 +261,7 @@  restrict the range of permissible idle states to the ones with core-level only
 References
 ==========
 
-.. [1] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2B*,
+.. [1] *Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2B*,
        https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-2b-manual.html
 
 .. [2] *Advanced Configuration and Power Interface (ACPI) Specification*,
diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst
index df29b4f1f219..d881a32acb6d 100644
--- a/Documentation/admin-guide/pm/intel_pstate.rst
+++ b/Documentation/admin-guide/pm/intel_pstate.rst
@@ -26,7 +26,7 @@  than just an operating frequency or an operating performance point (see the
 LinuxCon Europe 2015 presentation by Kristen Accardi [1]_ for more
 information about that).  For this reason, the representation of P-states used
 by ``intel_pstate`` internally follows the hardware specification (for details
-refer to Intel Software Developer’s Manual [2]_).  However, the ``CPUFreq`` core
+refer to Intel Software Developer's Manual [2]_).  However, the ``CPUFreq`` core
 uses frequencies for identifying operating performance points of CPUs and
 frequencies are involved in the user space interface exposed by it, so
 ``intel_pstate`` maps its internal representation of P-states to frequencies too
@@ -756,7 +756,7 @@  References
 .. [1] Kristen Accardi, *Balancing Power and Performance in the Linux Kernel*,
        https://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdf
 
-.. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*,
+.. [2] *Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3: System Programming Guide*,
        https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html
 
 .. [3] *Advanced Configuration and Power Interface Specification*,