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[209.132.180.67]) by mx.google.com with ESMTP id q63si10721280pfi.141.2016.01.28.00.26.32; Thu, 28 Jan 2016 00:26:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933742AbcA1I0b (ORCPT + 11 others); Thu, 28 Jan 2016 03:26:31 -0500 Received: from mail-pf0-f176.google.com ([209.85.192.176]:33484 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965196AbcA1IVJ (ORCPT ); Thu, 28 Jan 2016 03:21:09 -0500 Received: by mail-pf0-f176.google.com with SMTP id x125so20092771pfb.0 for ; Thu, 28 Jan 2016 00:21:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=5DH7OdgzrSER7vZVZDQTF1g8Pgai++lOhXMF/5Bs+lk=; b=MyVvHrSirCoYPD/QvJAY1bUKXsM3WTeWb8yzgZOY7mO6L1X5y2GjslpSnO6HgrAn90 ZebYxyVwCuHONeeaE3evXor5HGHNbuPUvD1dSqlBTSYYSKtQvjKqyU+UC6lz2XEKTHvs pRM3B1LpmdIa5VqfaAVdl19Ok0frtr0wXzI9o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=5DH7OdgzrSER7vZVZDQTF1g8Pgai++lOhXMF/5Bs+lk=; b=PA88eceMgvUhgAQ/Trlr/HVd/hBjbvXaPXLJMaNO7UWYCyhLB82XdDeNIRWRMCsc/x zz8PJRTXI8tu/GOXhvrnjVnWUqQwRFc6WRL3dWtlnI6aOWZKfC6URNvbOjaJu+QCUqNg hS1MJQTlzwZONHz5g80mAzKWPUykWmG1Q4Ne+ZDQ7s8Het4pdvkg863ZL2TN1sBBsUFd 2bw4jOmLUP75xkSYx5r0WS3WY9u09MVH97HUSfMMwsByvz0aepD9gjHE2hwnrKr43Ryj gFlexl0+B5gJRHqDq3PkcgPSea/zGCn4i6IG83z41fQRvFiEN2WBl6Td6W0WeCzikdZZ a15A== X-Gm-Message-State: AG10YOR1AuHKYuGOQwiL3JGzIexyi1EoW+EcoM+Z/z9UQDIr54R8kp00GSAETO+5ZCnxnxu1 X-Received: by 10.98.43.73 with SMTP id r70mr2716757pfr.4.1453969268740; Thu, 28 Jan 2016 00:21:08 -0800 (PST) Received: from localhost ([122.171.121.234]) by smtp.gmail.com with ESMTPSA id o4sm14169452pfa.85.2016.01.28.00.21.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Jan 2016 00:21:08 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, Stephen Boyd , nm@ti.com, Viresh Kumar , Greg Kroah-Hartman , Len Brown , linux-kernel@vger.kernel.org (open list), Pavel Machek , Viresh Kumar Subject: [PATCH V2 05/16] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings Date: Thu, 28 Jan 2016 13:50:34 +0530 Message-Id: <66c45bfa2c883dc169076568beef82fe96b4e69c.1453965717.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.7.0.79.gdc08a19 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org V2 bindings have better support for clock-latency and voltage-tolerance and doesn't need special care. To use callbacks, like dev_pm_opp_get_max_{transition|volt}_latency(), irrespective of the bindings, the core needs to know clock-latency/voltage-tolerance for the earlier bindings. This patch reads clock-latency/voltage-tolerance from the device node, irrespective of the bindings (to keep it simple) and use them only for V1 bindings. Signed-off-by: Viresh Kumar Reviewed-by: Stephen Boyd --- drivers/base/power/opp/core.c | 20 ++++++++++++++++++++ drivers/base/power/opp/opp.h | 6 ++++++ 2 files changed, 26 insertions(+) -- 2.7.0.79.gdc08a19 -- To unsubscribe from this list: send the line "unsubscribe linux-pm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.c index b0f5c72f0fc3..4fafa733a1c7 100644 --- a/drivers/base/power/opp/core.c +++ b/drivers/base/power/opp/core.c @@ -582,6 +582,7 @@ static struct device_opp *_add_device_opp(struct device *dev) { struct device_opp *dev_opp; struct device_list_opp *list_dev; + struct device_node *np; /* Check for existing list for 'dev' first */ dev_opp = _find_device_opp(dev); @@ -604,6 +605,21 @@ static struct device_opp *_add_device_opp(struct device *dev) return NULL; } + /* + * Only required for backward compatibility with v1 bindings, but isn't + * harmful for other cases. And so we do it unconditionally. + */ + np = of_node_get(dev->of_node); + if (np) { + u32 val; + + if (!of_property_read_u32(np, "clock-latency", &val)) + dev_opp->clock_latency_ns_max = val; + of_property_read_u32(np, "voltage-tolerance", + &dev_opp->voltage_tolerance_v1); + of_node_put(np); + } + srcu_init_notifier_head(&dev_opp->srcu_head); INIT_LIST_HEAD(&dev_opp->opp_list); @@ -861,6 +877,7 @@ static int _opp_add_v1(struct device *dev, unsigned long freq, long u_volt, { struct device_opp *dev_opp; struct dev_pm_opp *new_opp; + unsigned long tol; int ret; /* Hold our list modification lock here */ @@ -874,7 +891,10 @@ static int _opp_add_v1(struct device *dev, unsigned long freq, long u_volt, /* populate the opp table */ new_opp->rate = freq; + tol = u_volt * dev_opp->voltage_tolerance_v1 / 100; new_opp->u_volt = u_volt; + new_opp->u_volt_min = u_volt - tol; + new_opp->u_volt_max = u_volt + tol; new_opp->available = true; new_opp->dynamic = dynamic; diff --git a/drivers/base/power/opp/opp.h b/drivers/base/power/opp/opp.h index 416293b7da23..fe44beb404ba 100644 --- a/drivers/base/power/opp/opp.h +++ b/drivers/base/power/opp/opp.h @@ -138,6 +138,8 @@ struct device_list_opp { * @dentry: debugfs dentry pointer of the real device directory (not links). * @dentry_name: Name of the real dentry. * + * @voltage_tolerance_v1: In percentage, for v1 bindings only. + * * This is an internal data structure maintaining the link to opps attached to * a device. This structure is not meant to be shared to users as it is * meant for book keeping and private to OPP library. @@ -156,6 +158,10 @@ struct device_opp { struct device_node *np; unsigned long clock_latency_ns_max; + + /* For backward compatibility with v1 bindings */ + unsigned int voltage_tolerance_v1; + bool shared_opp; struct dev_pm_opp *suspend_opp;