Message ID | 20250518220707.669515-9-jonas@kwiboo.se |
---|---|
State | New |
Headers | show |
Series | None | expand |
diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml index 41e0c56ef8e3..f776041fd08f 100644 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -47,6 +47,9 @@ properties: - const: saradc - const: apb_pclk + power-domains: + maxItems: 1 + resets: maxItems: 1
The SARADC controller in most Rockchip SoCs are part or power domains that are always powered on, i.e. PD_BUS or PD_PERI. On RK3528 the SARADC controller is part of the PD_VPU power domain. Add support to describe power-domains for the SARADC controllers. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 3 +++ 1 file changed, 3 insertions(+)