From patchwork Thu Apr 10 15:47:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 880008 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0A9A256C8A; Thu, 10 Apr 2025 15:47:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744300071; cv=none; b=KtIqkK5yqCYZ37jioNkk8WFwS4N5aJ87HYD0459z954lGRvMKHBef3rOAN7fZqB1QtRaKTvDCWjDqU/Dqkhuadpe9evUB6tHts+s+FgHs09SoQRQ8DwwiTcHBQejpfVbI7oYZzJi/Ydv2kNHSyMRtFt4S34YnVvj1pv3ZbgJZYU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744300071; c=relaxed/simple; bh=iDeiMpH2/KxFQOc/7AuYydAb8NCVCSm+fEB6mcijRro=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eTP1CEZDlKFq72Gm9khm5ZQbb4el5DA0FmZyZ7X+h5GZp9xKNlF8n0q6krB98b5cYHEmBEw1P2q0vDhHsddXSm3h/iLB1XRQgoa7Kzqmjg2/5nRU47/BbftTavthav+68IZD5VkZfk1ay8n4n1zmQhb5sQsRoO7nofNR3wWAXYg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N3WR9nvb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N3WR9nvb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16781C4CEDD; Thu, 10 Apr 2025 15:47:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744300070; bh=iDeiMpH2/KxFQOc/7AuYydAb8NCVCSm+fEB6mcijRro=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=N3WR9nvbHwdU8OqfFIc/mAfEz0Nmc09RDoFYeBK7Cd1q4dU8AiGidDCnyDh2Yd6Ff khtIEZeAm5b3jsSSJCwlepHT5Cjj7NPKSZRHCw+YnxgdCh+KREBBp8Lv14VEFi4Dwi RlYARWcnQS1qsk7DPNfsjiBO0DHdhlse12UYxFM9X2jY8w8vYAu8NxrNxkiG4smfD2 K+u7CqTDULdw+eay4gEuHbdO4mN6JROOW/+cMc8jwjY3mdH4cOIFRIqM2LD4ggstNg XT+EhJsutbL2iP7y0ydVIsOgAupR55qA+AUnocPW19n1khPPot918ofQg6cvjhRrCs aMHf0ORhxZLHg== From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:24 -0500 Subject: [PATCH v2 03/17] arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250410-dt-cpu-schema-v2-3-63d7dc9ddd0a@kernel.org> References: <20250410-dt-cpu-schema-v2-0-63d7dc9ddd0a@kernel.org> In-Reply-To: <20250410-dt-cpu-schema-v2-0-63d7dc9ddd0a@kernel.org> To: Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Conor Dooley , Nicolas Ferre , Claudiu Beznea , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Bjorn Andersson , Konrad Dybcio , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Heiko Stuebner , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , Andy Gross , Thomas Bogendoerfer , Viresh Kumar , Nishanth Menon , Stephen Boyd , zhouyanjie@wanyeetech.com, Matthias Brugger , AngeloGioacchino Del Regno , "Rafael J. Wysocki" , Dmitry Baryshkov , Stephan Gerhold Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, imx@lists.linux.dev, linux-rockchip@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-mips@vger.kernel.org, linux-pm@vger.kernel.org, linux-mediatek@lists.infradead.org X-Mailer: b4 0.15-dev The "spin-table" enable-method requires "cpu-release-addr" property, so add a dummy entry. It is assumed the bootloader will fill in the correct values. Signed-off-by: Rob Herring (Arm) Reviewed-by: Daniel Machon Tested-by: Daniel Machon --- arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi index 32bb76b3202a..83bf5c81b5f7 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi @@ -12,10 +12,12 @@ &psci { &cpu0 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu1 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &uart0 {