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Thu, 16 Jan 2025 21:43:28 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Thu, 16 Jan 2025 21:43:28 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Thu, 16 Jan 2025 21:43:28 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Thu, 16 Jan 2025 21:43:27 -0500 Received: from kim-VirtualBox.ad.analog.com (KPALLER2-L03.ad.analog.com [10.116.18.50]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 50H2hFaE024687; Thu, 16 Jan 2025 21:43:18 -0500 From: Kim Seer Paller To: Sebastian Reichel CC: , , "Kim Seer Paller" , Nuno Sa Subject: [PATCH v2] power: supply: ltc4162l: Use GENMASK macro in bitmask operation Date: Fri, 17 Jan 2025 10:43:07 +0800 Message-ID: <20250117024307.4119-1-kimseer.paller@analog.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: YP7DffjpTTIyyxN6V0Y9LhJMd2_xG3Av X-Proofpoint-ORIG-GUID: YP7DffjpTTIyyxN6V0Y9LhJMd2_xG3Av X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-16_11,2025-01-16_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 spamscore=0 bulkscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501170019 Replace the bitmask operation BIT(6) - 1 with GENMASK(5, 0) to make the code clearer and readable. Reviewed-by: Nuno Sa Signed-off-by: Kim Seer Paller --- V1 -> V2: Removed inline comments after the bitmask operation. Added Reviewed-by tag. drivers/power/supply/ltc4162-l-charger.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) base-commit: a3a8799165ff83bb764fd800c6559c3cba0ddac3 diff --git a/drivers/power/supply/ltc4162-l-charger.c b/drivers/power/supply/ltc4162-l-charger.c index 24b62f000..23eb42629 100644 --- a/drivers/power/supply/ltc4162-l-charger.c +++ b/drivers/power/supply/ltc4162-l-charger.c @@ -410,7 +410,7 @@ static int ltc4162l_get_icharge(struct ltc4162l_info *info, if (ret) return ret; - regval &= BIT(6) - 1; /* Only the lower 5 bits */ + regval &= GENMASK(5, 0); /* The charge current servo level: (icharge_dac + 1) × 1mV/RSNSB */ ++regval; @@ -449,7 +449,7 @@ static int ltc4162l_get_vcharge(struct ltc4162l_info *info, if (ret) return ret; - regval &= BIT(6) - 1; /* Only the lower 5 bits */ + regval &= GENMASK(5, 0); /* * charge voltage setting can be computed from @@ -500,7 +500,7 @@ static int ltc4015_get_vcharge(struct ltc4162l_info *info, if (ret) return ret; - regval &= BIT(6) - 1; /* Only the lower 5 bits */ + regval &= GENMASK(5, 0); /* * charge voltage setting can be computed from: @@ -636,7 +636,7 @@ static int ltc4162l_get_iin_limit_dac(struct ltc4162l_info *info, if (ret) return ret; - regval &= BIT(6) - 1; /* Only 6 bits */ + regval &= GENMASK(5, 0); /* (iin_limit_dac + 1) × 500μV / RSNSI */ ++regval;