| Message ID | 20250109-gpu-acd-v4-5-08a5efaf4a23@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v4,1/7] drm/msm/adreno: Add support for ACD | expand |
On Thu, Jan 09, 2025 at 02:10:01AM +0530, Akhil P Oommen wrote: > Add a new schema which extends opp-v2 to support a new vendor specific > property required for Adreno GPUs found in Qualcomm's SoCs. The new > property called "qcom,opp-acd-level" carries a u32 value recommended > for each opp needs to be shared to GMU during runtime. > > Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. > > Cc: Rob Clark <robdclark@gmail.com> > Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> > --- > .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 98 insertions(+) > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml > new file mode 100644 > index 000000000000..de1f7c6c4f0e > --- /dev/null > +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml > @@ -0,0 +1,97 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Adreno compatible OPP supply > + > +description: > + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific > + ACD related information tailored for the specific chipset. This binding > + provides the information needed to describe such a hardware value. > + > +maintainers: > + - Rob Clark <robdclark@gmail.com> > + You need select: here. See bot's warnings and other schemas, like primecell, how they do it. Best regards, Krzysztof
On 1/9/2025 1:36 PM, Krzysztof Kozlowski wrote: > On Thu, Jan 09, 2025 at 02:10:01AM +0530, Akhil P Oommen wrote: >> Add a new schema which extends opp-v2 to support a new vendor specific >> property required for Adreno GPUs found in Qualcomm's SoCs. The new >> property called "qcom,opp-acd-level" carries a u32 value recommended >> for each opp needs to be shared to GMU during runtime. >> >> Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. >> >> Cc: Rob Clark <robdclark@gmail.com> >> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> >> --- >> .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++ >> MAINTAINERS | 1 + >> 2 files changed, 98 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >> new file mode 100644 >> index 000000000000..de1f7c6c4f0e >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >> @@ -0,0 +1,97 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Adreno compatible OPP supply >> + >> +description: >> + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific >> + ACD related information tailored for the specific chipset. This binding >> + provides the information needed to describe such a hardware value. >> + >> +maintainers: >> + - Rob Clark <robdclark@gmail.com> >> + > > You need select: here. See bot's warnings and other schemas, like > primecell, how they do it. Somehow this error is not reproducible on my setup. I have upgraded both Dtschema (2024.11) and and yamllint. Anyway, could you please confirm if the below addition would be sufficient? select: required: - compatible properties: compatible: contains: const: operating-points-v2-adreno -Akhil > > Best regards, > Krzysztof >
On 09/01/2025 14:13, Akhil P Oommen wrote: > On 1/9/2025 1:36 PM, Krzysztof Kozlowski wrote: >> On Thu, Jan 09, 2025 at 02:10:01AM +0530, Akhil P Oommen wrote: >>> Add a new schema which extends opp-v2 to support a new vendor specific >>> property required for Adreno GPUs found in Qualcomm's SoCs. The new >>> property called "qcom,opp-acd-level" carries a u32 value recommended >>> for each opp needs to be shared to GMU during runtime. >>> >>> Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. >>> >>> Cc: Rob Clark <robdclark@gmail.com> >>> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> >>> --- >>> .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++ >>> MAINTAINERS | 1 + >>> 2 files changed, 98 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >>> new file mode 100644 >>> index 000000000000..de1f7c6c4f0e >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >>> @@ -0,0 +1,97 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Qualcomm Adreno compatible OPP supply >>> + >>> +description: >>> + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific >>> + ACD related information tailored for the specific chipset. This binding >>> + provides the information needed to describe such a hardware value. >>> + >>> +maintainers: >>> + - Rob Clark <robdclark@gmail.com> >>> + >> >> You need select: here. See bot's warnings and other schemas, like >> primecell, how they do it. > > Somehow this error is not reproducible on my setup. I have upgraded both > Dtschema (2024.11) and and yamllint. You probably need to test all bindings, so skipping DT_SCHEMA_FILES > Anyway, could you please confirm if the below addition would be sufficient? > > select: > required: > - compatible > properties: > compatible: > contains: > const: operating-points-v2-adreno For this binding yes, but if the warning persist, then you might need to update operating-points-v2 as well, with a similar select but without "contains:". Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml new file mode 100644 index 000000000000..de1f7c6c4f0e --- /dev/null +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Adreno compatible OPP supply + +description: + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific + ACD related information tailored for the specific chipset. This binding + provides the information needed to describe such a hardware value. + +maintainers: + - Rob Clark <robdclark@gmail.com> + +allOf: + - $ref: opp-v2-base.yaml# + +properties: + compatible: + items: + - const: operating-points-v2-adreno + - const: operating-points-v2 + +patternProperties: + '^opp-[0-9]+$': + type: object + additionalProperties: false + + properties: + opp-hz: true + + opp-level: true + + opp-peak-kBps: true + + opp-supported-hw: true + + qcom,opp-acd-level: + description: | + A positive value representing the ACD (Adaptive Clock Distribution, + a fancy name for clk throttling during voltage droop) level associated + with this OPP node. This value is shared to a co-processor inside GPU + (called Graphics Management Unit a.k.a GMU) during wake up. It may not + be present for some OPPs and GMU will disable ACD while transitioning + to that OPP. This value encodes a voltage threshold, delay cycles & + calibration margins which are identified by characterization of the + SoC. So, it doesn't have any unit. This data is passed to GMU firmware + via 'HFI_H2F_MSG_ACD' packet. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - opp-hz + - opp-level + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include <dt-bindings/power/qcom-rpmpd.h> + + gpu_opp_table: opp-table { + compatible = "operating-points-v2-adreno", "operating-points-v2"; + + opp-687000000 { + opp-hz = /bits/ 64 <687000000>; + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; + opp-peak-kBps = <8171875>; + qcom,opp-acd-level = <0x882e5ffd>; + }; + + opp-550000000 { + opp-hz = /bits/ 64 <550000000>; + opp-level = <RPMH_REGULATOR_LEVEL_SVS>; + opp-peak-kBps = <6074219>; + qcom,opp-acd-level = <0xc0285ffd>; + }; + + opp-390000000 { + opp-hz = /bits/ 64 <390000000>; + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; + opp-peak-kBps = <3000000>; + qcom,opp-acd-level = <0xc0285ffd>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>; + opp-peak-kBps = <2136719>; + /* Intentionally left out qcom,opp-acd-level property here */ + }; + + }; diff --git a/MAINTAINERS b/MAINTAINERS index 910305c11e8a..f7119623e1f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7292,6 +7292,7 @@ S: Maintained B: https://gitlab.freedesktop.org/drm/msm/-/issues T: git https://gitlab.freedesktop.org/drm/msm.git F: Documentation/devicetree/bindings/display/msm/gpu.yaml +F: Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml F: drivers/gpu/drm/msm/adreno/ F: drivers/gpu/drm/msm/msm_gpu.* F: drivers/gpu/drm/msm/msm_gpu_devfreq.*
Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> --- .../bindings/opp/opp-v2-qcom-adreno.yaml | 97 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 98 insertions(+)