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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF000044A4.mail.protection.outlook.com (10.167.243.155) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Mon, 21 Oct 2024 17:56:42 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 21 Oct 2024 12:56:41 -0500 From: Mario Limonciello To: Borislav Petkov CC: Thomas Gleixner , Ingo Molnar , "Dave Hansen" , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H . Peter Anvin" , "Rafael J . Wysocki" , "Gautham R . Shenoy" , Mario Limonciello , Perry Yuan , Brijesh Singh , Peter Zijlstra , Li RongQing , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "open list:ACPI" , "open list:AMD PSTATE DRIVER" Subject: [PATCH 1/4] x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix Date: Mon, 21 Oct 2024 12:55:06 -0500 Message-ID: <20241021175509.2079-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241021175509.2079-1-mario.limonciello@amd.com> References: <20241021175509.2079-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A4:EE_|IA1PR12MB6257:EE_ X-MS-Office365-Filtering-Correlation-Id: dad8b7e6-163c-4f54-1a08-08dcf1f9b8b1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|36860700013|7416014|376014; X-Microsoft-Antispam-Message-Info: 2ks5VSURmadcxiflrDDiDChvs6+ahSjXp6ZF8fxVyOGCuciUFE+xvIUVhxddOaKF2hzNCf4mg6gsT2gvD9AUjs9EzxErEFe5MYyLPhmfGcUG/Jl4hGNPshZ+ZyZ0H6NhALnQXl24Z0X0BKroV5BIEE2K3Ut7FVx2JmuJ64MWv3RyioFHbPx+83MeBKALRHh67tFfDap2+pT85uytJpwIhWj/bq8tHmjGMLHxrU+AfStBX0O1c+8i/7qYmM2B9Ya0m8HnvqVOFUdYzhBUVQJXc/aRxPbZZou0Q6fNFLhpu20+AdEEE0GNVHi5l3COZ6TfMAPXZrlZhbZndfXTmBo1utAHfw8ppoI3rX7hG60TjuWaEm3iOxbBuub18P9hYYQbI37zWEXrVjMl1ylUFK8dNn6rQ48YUXpQYKAXSxWJcC+cc21DbsrRNSrhmcOL6jwMEdkHG4LQ8plO4o9uaepYQOvNRw5O13NrmHxe6D762NQ5cAOgUmKpA9OiOG+5i30+5ExKYkZEQtWw0MzAxpmKS41OKS0ptFAnkuquQIgEE0r/IC4tQFu7R9YoOHaoS+5gCp/KWslQWC8ymCmBNGThxTxOhWHE9CBeCz3xN2BsnD1q0xRNnodktuO3tXf/Qnxa+SuwwKcag1HEfn/F1X7FnF0uN2E3MIhssZnibxhGA6M8x9gXemFOhheiaPm5aZXyRgIy/9W8CYrcCLJDG0W7+RLu39qfVjFPDAgLnLzoRXgAU0eiFi/9/Qy/OVT4WLBJ/qasasq8Tt9MNtBsJBeV2DcfdFmSyOrurkxi4E2+DtduVmqRM9BOQxqkp0M4fsbwxMFr/BBzs5F4lEbS60e2gbeQXWj6NmBk7LmYWfr6t5h0ygEvpoOm5q7GTfNLqjAyQhG26hZo8oBES45QPPmxD2znr+c9gq2d/E5Wyc2Od2N8bgr7ZfSX0d/2MsetRKEf/BV9fL60YZZzQsqnZPeLwcmx9c1Th6IsEFL/hiGUjEyJUpJ4N8L/Pa4HHzrDGgyUf1sTf1OrIsWwhXfeu8O+fAMbypzGo/W7VszIxGan/cRQC7aIDazV8PSBW9yYaRWxI7Uq6Ef58+BNsQGwZfteX6e8y8FJTB1TG/7aSe3W+IM13fCGqXLz7+y1X2UwI8yWrGX5bzogSKTeL9y14mEHUWOXUE1dBOadtJboa8nBa513gP4RHONIluLzc2gNRqk19sZ1ZmeiQaLGNesEfR3KunIrAWzCn690prI5wrvtS+fegwaxbho8PTVE7m5uLWcmNlE9aYp40oAoQLGkM9HNXAL2pbJ3h/hbNwi6d1W9479wfatKbWFC6b5zBZ+a1Ts+3DX3oantPrGR+CUhC2F2Vqo1xLLshQvOQwKxPfoDkjA4i3U1dvqQnR9tcc68x/WGcHK4euE3hXnocLx20wTr5A== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(36860700013)(7416014)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2024 17:56:42.6907 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dad8b7e6-163c-4f54-1a08-08dcf1f9b8b1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A4.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6257 This feature is an AMD unique feature of some processors, so put AMD into the name. Signed-off-by: Mario Limonciello --- arch/x86/include/asm/cpufeatures.h | 2 +- arch/x86/kernel/cpu/scattered.c | 2 +- drivers/cpufreq/amd-pstate.c | 2 +- tools/arch/x86/include/asm/cpufeatures.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index cea1ed82aeb48..424bb7ae8914a 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -472,7 +472,7 @@ #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ -#define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ +#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ #define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ /* diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 3bba55323163b..d7f2c19abce33 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -45,7 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, - { X86_FEATURE_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, + { X86_FEATURE_AMD_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3c14962adeb22..2670bdcad6eda 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -844,7 +844,7 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) transition_delay_ns = cppc_get_transition_latency(cpu); if (transition_delay_ns == CPUFREQ_ETERNAL) { - if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC)) + if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC)) return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY; else return AMD_PSTATE_TRANSITION_DELAY; diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index dd4682857c120..23698d0f4bb47 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -472,7 +472,7 @@ #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ -#define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ +#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ /* * BUG word(s)