From patchwork Tue Sep 3 22:02:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nikunj Kela X-Patchwork-Id: 825195 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A14CB1DEFF1; Tue, 3 Sep 2024 22:03:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725401030; cv=none; b=uCHSNji9UZ8ramBp9piZ5gyQ7HTbzB2NOpgTvigKfZb7KXPyoECqNUQatcV8pzdW4+XLoFbo/CQ7zg2NCtPtNrCDkHzk7meMnxFZPGN7CvhodHu90Au5UH3uyzpfzhfmkyUhyLS6YXiDPquaRu/DGsu7BIuWkhY0Qek3ziSejp0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725401030; c=relaxed/simple; bh=/aGpNv5Tn7Uvep4sJAJXSbu87pEBo6J3N5HbHCzSED4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VMmmykgPgnJPijNN4FBN3sUUCEhfDdPIQkqsYl527Zr8d8NErvrGhpun3IFyitdyRrcKWDlXf6YOw2C1Fb1djC4ROa03EozFI305YZULxgiwVXT4N9TPAQkGdjp2XvFU5ndWUdFP+XSdjBSwhqGEevG/IpadVh8taNT+0tzX7Kk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=gSrxYKGW; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="gSrxYKGW" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 483Luqit002825; Tue, 3 Sep 2024 22:03:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 2whnlUEp09ZmiR2IEXP0dEyJNZpVKtnfyMFr5+GpBkI=; b=gSrxYKGW3XZivwtv U4pa74FDc/KTxHlCpOGt+l46VYKaOwkfYVotL9mCIJZibOF0RaEz4T9gd/v3TuFo vkGva0205omSDQHWIJ3Dlby8X/oQPS5JfAqdt5sqzHLKmRUiB179WZUCMiaE6NpG Npghc3CloGr0RhOlLST2oPS4weU2PMDRvQ9M3NtbBdh7sGRXl4NEvw7GLPs8zJaF XuCFnsbMSJ5694kvTG56b+tLtv1uWL4S6vb6HDW83breyRUFsWozgOG1Z/+r7gmI V0EAd5Sa2yZfNc7nQGAdmwiw89ZvtvgCtLzyIBW7QXcWLeM/d0MI7Zd7lFwpQpZF DKOZbg== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41drqe344m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 03 Sep 2024 22:03:16 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 483M3FNT002714 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 3 Sep 2024 22:03:15 GMT Received: from hu-nkela-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 3 Sep 2024 15:03:12 -0700 From: Nikunj Kela To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v2 20/21] dt-bindings: arm: GIC: add ESPI and EPPI specifiers Date: Tue, 3 Sep 2024 15:02:39 -0700 Message-ID: <20240903220240.2594102-21-quic_nkela@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903220240.2594102-1-quic_nkela@quicinc.com> References: <20240828203721.2751904-1-quic_nkela@quicinc.com> <20240903220240.2594102-1-quic_nkela@quicinc.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HHKWHMY--oNGD-fBLjAj-YYaqebbnpqK X-Proofpoint-ORIG-GUID: HHKWHMY--oNGD-fBLjAj-YYaqebbnpqK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-03_10,2024-09-03_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 spamscore=0 mlxlogscore=613 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409030177 Add interrupt specifier for extended SPI and extended PPI interrupts. Qualcomm SA8255p platform uses extended SPI for SCMI 'a2p' doorbells. Signed-off-by: Nikunj Kela --- include/dt-bindings/interrupt-controller/arm-gic.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h index 35b6f69b7db6..887f53363e8a 100644 --- a/include/dt-bindings/interrupt-controller/arm-gic.h +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -12,6 +12,8 @@ #define GIC_SPI 0 #define GIC_PPI 1 +#define GIC_ESPI 2 +#define GIC_EPPI 3 /* * Interrupt specifier cell 2.