| Message ID | 20240729231259.2122976-2-quic_amelende@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | thermal: qcom-spmi-temp-alarm: add support for new TEMP_ALARM subtypes | expand |
On 30/07/2024 01:12, Anjelique Melendez wrote: > Add compatible "qcom,spmi-temp-alarm-gen2-rev2" for SPMI temp alarm GEN2 > revision 2 peripherals. GEN2 rev2 peripherals have individual temp DAC > registers to set temperature thresholds for over-temperature stages 1-3. > Registers are configured based on thermal zone trip definition. > > Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> > --- > .../devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml > index 30b22151aa82..f9af88d51c2d 100644 > --- a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml > +++ b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml > @@ -12,14 +12,16 @@ maintainers: > description: > QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips > that utilize the Qualcomm SPMI implementation. These peripherals provide an > - interrupt signal and status register to identify high PMIC die temperature. > + interrupt signal and status registers to identify high PMIC die temperature. > > allOf: > - $ref: thermal-sensor.yaml# > > properties: > compatible: > - const: qcom,spmi-temp-alarm > + enum: > + - qcom,spmi-temp-alarm > + - qcom,spmi-temp-alarm-gen2-rev2 Nah, no. I have no clue what is gen2 rev2 and no one would be able to decipher it, even with usermanual. Do not invent some random versions. If you want to use them, document them and make them available for public. Use SoC compatibles. ONLY. Best regards, Krzysztof
On 30/07/2024 08:19, Krzysztof Kozlowski wrote: > On 30/07/2024 01:12, Anjelique Melendez wrote: >> Add compatible "qcom,spmi-temp-alarm-gen2-rev2" for SPMI temp alarm GEN2 >> revision 2 peripherals. GEN2 rev2 peripherals have individual temp DAC >> registers to set temperature thresholds for over-temperature stages 1-3. >> Registers are configured based on thermal zone trip definition. >> >> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> >> --- >> .../devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml >> index 30b22151aa82..f9af88d51c2d 100644 >> --- a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml >> +++ b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml >> @@ -12,14 +12,16 @@ maintainers: >> description: >> QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips >> that utilize the Qualcomm SPMI implementation. These peripherals provide an >> - interrupt signal and status register to identify high PMIC die temperature. >> + interrupt signal and status registers to identify high PMIC die temperature. >> >> allOf: >> - $ref: thermal-sensor.yaml# >> >> properties: >> compatible: >> - const: qcom,spmi-temp-alarm >> + enum: >> + - qcom,spmi-temp-alarm >> + - qcom,spmi-temp-alarm-gen2-rev2 > > Nah, no. I have no clue what is gen2 rev2 and no one would be able to > decipher it, even with usermanual. Do not invent some random versions. > If you want to use them, document them and make them available for public. > > Use SoC compatibles. ONLY. SoC->PMIC, obviously. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml index 30b22151aa82..f9af88d51c2d 100644 --- a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml @@ -12,14 +12,16 @@ maintainers: description: QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips that utilize the Qualcomm SPMI implementation. These peripherals provide an - interrupt signal and status register to identify high PMIC die temperature. + interrupt signal and status registers to identify high PMIC die temperature. allOf: - $ref: thermal-sensor.yaml# properties: compatible: - const: qcom,spmi-temp-alarm + enum: + - qcom,spmi-temp-alarm + - qcom,spmi-temp-alarm-gen2-rev2 reg: maxItems: 1
Add compatible "qcom,spmi-temp-alarm-gen2-rev2" for SPMI temp alarm GEN2 revision 2 peripherals. GEN2 rev2 peripherals have individual temp DAC registers to set temperature thresholds for over-temperature stages 1-3. Registers are configured based on thermal zone trip definition. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> --- .../devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)